403Webshell
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Web Server : Apache/2.4.58 (Ubuntu)
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PHP Version : 8.3.6
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Current File : /sys/kernel/btf/amdgpu
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USE_VF_NEG_1_FREQUENCYPP_GRTAVFS_FW_SEP_FUSE_VF4_FREQUENCYPP_GRTAVFS_FW_SEP_FUSE_FREQUENCY_TO_COUNT_SCALER_0PP_GRTAVFS_FW_SEP_FUSE_FREQUENCY_TO_COUNT_SCALER_1PP_GRTAVFS_FW_SEP_FUSE_FREQUENCY_TO_COUNT_SCALER_2PP_GRTAVFS_FW_SEP_FUSE_FREQUENCY_TO_COUNT_SCALER_3PP_GRTAVFS_FW_SEP_FUSE_FREQUENCY_TO_COUNT_SCALER_4PP_GRTAVFS_FW_SEP_FUSE_COUNTOffsetMaxCurrentSviTelemetryScale_tFAN_MODE_AUTOFAN_MODE_MANUAL_LINEARFeatureCtrlMaskVoltageOffsetPerZoneBoundaryReservedGfxclkFminGfxclkFmaxUclkFminUclkFmaxPptTdcFanLinearPwmPointsFanLinearTempPointsFanMinimumPwmAcousticTargetRpmThresholdAcousticLimitRpmThresholdFanTargetTemperatureFanZeroRpmEnableFanZeroRpmStopTempFanModeMaxOpTempOverDriveTable_tOverDriveTableOverDriveTableExternal_tReserved1Reserved2OverDriveLimits_tInitGfxclk_bypassInitSocclkInitMp0clkInitMpioclkInitSmnclkInitUcpclkInitCsrclkInitDprefclkInitDcfclkInitDtbclkInitDclkInitVclkInitUsbdfsclkInitMp1clkInitLclkInitBaco400clk_bypassInitBaco1200clk_bypassInitBaco700clk_bypassInitFclkInitGfxclk_clkbInitUclkDPMStateInitVcoFreqPll0InitVcoFreqPll1InitVcoFreqPll2InitVcoFreqPll3InitVcoFreqPll4InitVcoFreqPll5InitVcoFreqPll6InitGfxInitSocInitUBootValues_tTemperaturePwmLimitMinPwmLimitMaxSpare1AcousticTargetRpmThresholdMinAcousticTargetRpmThresholdMaxAcousticLimitRpmThresholdMinAcousticLimitRpmThresholdMaxPccLimitMinPccLimitMaxFanStopTempMinFanStopTempMaxFanStartTempMinFanStartTempMaxPowerMinPpt0MsgLimits_tBaseClockAcGameClockAcBoostClockAcBaseClockDcGameClockDcBoostClockDcDriverReportedClocks_tDcBtcEnabledDcTolDcBtcGbDcBtcMinDcBtcMaxDcBtcGbScalarAvfsDcBtcParams_tAvfsTempVftFMinVInversionqVftqAvfsGbqAvfsGb2AvfsFuseOverride_tVersionFeaturesToRunTotalPowerConfigCustomerVariantMemoryTemperatureTypeMaskSmartShiftVersionSocketPowerLimitAcSocketPowerLimitDcSocketPowerLimitSmartShift2EnableLegacyPptLimitUseInputTelemetrySmartShiftMinReportedPptinDcsPaddingPptVrTdcLimitPlatformTdcLimitTemperatureLimitHwCtfTempLimitPaddingInfraFitControllerFailureRateLimitFitControllerGfxDutyCycleFitControllerSocDutyCycleFitControllerSocOffsetGfxApccPlusResidencyLimitThrottlerControlMaskFwDStateMaskUlvVoltageOffsetUlvVoltageOffsetUDeepUlvVoltageOffsetSocDefaultMaxVoltageBoostMaxVoltageVminTempHystersisVminTempThresholdVmin_Hot_T0Vmin_Cold_T0Vmin_Hot_EolVmin_Cold_EolVmin_Aging_OffsetSpare_Vmin_Plat_Offset_HotSpare_Vmin_Plat_Offset_ColdVcBtcFixedVminAgingOffsetVcBtcVmin2PsmDegrationGbVcBtcPsmAVcBtcPsmBVcBtcVminAVcBtcVminBPerPartVminEnabledVcBtcEnabledSocketPowerLimitAcTauSocketPowerLimitDcTauVmin_droopSpareVminDpmDescriptorFreqTableGfxFreqTableVclkFreqTableDclkFreqTableSocclkFreqTableUclkFreqTableDispclkFreqTableDppClkFreqTableDprefclkFreqTableDcfclkFreqTableDtbclkFreqTableFclkDcModeMaxFreqMp0clkFreqMp0DpmVoltageGfxclkSpareGfxclkFreqCapGfxclkFgfxoffEntryGfxclkFgfxoffExitImuGfxclkFgfxoffExitRlcGfxclkThrottleClockEnableGfxPowerStagesGpioGfxIdlePaddingSmsRepairWRCKClkDivEnSmsRepairWRCKClkDivValGfxOffEntryEarlyMGCGEnGfxOffEntryForceCGCGEnGfxOffEntryForceCGCGDelayEnGfxOffEntryForceCGCGDelayValGfxclkFreqGfxUlvGfxIdlePadding2GfxOffEntryHysteresisGfxoffSpareDfllBtcMasterScalerMDfllBtcMasterScalerBDfllBtcSlaveScalerMDfllBtcSlaveScalerBDfllPccAsWaitCtrlDfllPccAsStepCtrlGfxGpoSpareDcsGfxOffVoltagePaddingDcsDcsMinGfxOffTimeDcsMaxGfxOffTimeDcsMinCreditAccumDcsExitHysteresisDcsTimeoutDcsSpareShadowFreqTableUclkUseStrobeModeOptimizationsPaddingMemUclkDpmPstatesFreqTableUclkDivMemVmempVoltageMemVddioVoltageFclkDpmUPstatesFclkDpmVddUFclkDpmUSpeedFclkDpmDisallowPstateFreqPaddingFclkPcieGenSpeedPcieLaneCountLclkFreqFanStopTempFanStartTempFanGainFanGainPaddingFanPwmMinFanMaximumRpmMGpuAcousticLimitRpmThresholdFanTargetGfxclkTempInputSelectMaskFanTachEdgePerRevFuzzyFan_ErrorSetDeltaFuzzyFan_ErrorRateSetDeltaFuzzyFan_PwmSetDeltaFuzzyFan_ReservedFwCtfLimitIntakeTempEnableRPMIntakeTempOffsetTempIntakeTempReleaseTempIntakeTempHighIntakeAcousticLimitIntakeTempAcouticLimitReleaseRateFanAbnormalTempLimitOffsetFanStalledTriggerRpmFanAbnormalTriggerRpmCoeffFanAbnormalDetectionEnableFanIntakeSensorSupportFanIntakePaddingFanSpareOverrideGfxAvfsFusesGfxAvfsPaddingL2HwRtAvfsFusesSeHwRtAvfsFusesCommonRtAvfsL2FwRtAvfsFusesSeFwRtAvfsFusesDroop_PWL_FDroop_PWL_aDroop_PWL_bDroop_PWL_cStatic_PWL_OffsetdGbV_dT_vmindGbV_dT_vmaxV2F_vmin_range_lowV2F_vmin_range_highV2F_vmax_range_lowV2F_vmax_range_highDcBtcGfxParamsGfxAvfsSpareOverrideSocAvfsFusesMinSocAvfsRevisionSocAvfsPaddingSocAvfsFuseOverridedBtcGbSocqAgingGbqStaticVoltageOffsetDcBtcSocParamsSocAvfsSpareBootValuesDriverReportedClocksMsgLimitsOverDriveLimitsMinOverDriveLimitsBasicMaxOverDriveLimitsAdvancedMaxDebugOverridesTotalBoardPowerSupportTotalBoardPowerPaddingTotalIdleBoardPowerMTotalIdleBoardPowerBTotalBoardPowerMTotalBoardPowerBqFeffCoeffGameClockqFeffCoeffBaseClockqFeffCoeffBoostClockSkuTable_tI2cControllersVddGfxVrMappingVddSocVrMappingVddMem0VrMappingVddMem1VrMappingGfxUlvPhaseSheddingMaskSocUlvPhaseSheddingMaskVmempUlvPhaseSheddingMaskVddioUlvPhaseSheddingMaskSlaveAddrMappingVrPsiSupportPaddingPsiEnablePsi6SviTelemetryScaleVoltageTelemetryRatioDownSlewRateVrLedOffGpioFanOffGpioGfxVrPowerStageOffGpioAcDcGpioAcDcPolarityVR0HotGpioVR0HotPolarityGthrGpioGthrPolarityLedPin0LedPin1LedPin2LedEnableMaskLedPcieLedErrorUclkTrainingModeSpreadPercentUclkSpreadPaddingUclkSpreadFreqUclkSpreadPercentFclkSpreadPaddingFclkSpreadPercentFclkSpreadFreqDramWidthPaddingMem1HsrEnabledVddqOffEnabledPaddingUmcFlagsPostVoltageSetBacoDelayBacoEntryDelayFuseWritePowerMuxPresentFuseWritePaddingBoardSpareBoardTable_tSkuTableBoardTablePPTable_tCurrClockAverageGfxclkFrequencyTargetAverageGfxclkFrequencyPreDsAverageGfxclkFrequencyPostDsAverageFclkFrequencyPreDsAverageFclkFrequencyPostDsAverageMemclkFrequencyPreDsAverageMemclkFrequencyPostDsAverageVclk0FrequencyAverageDclk0FrequencyAverageVclk1FrequencyAverageDclk1FrequencyPCIeBusydGPU_W_MAXMetricsCounterAvgVoltageAvgCurrentAverageGfxActivityAverageUclkActivityVcn0ActivityPercentageVcn1ActivityPercentageEnergyAccumulatorAverageSocketPowerAverageTotalBoardPowerAvgTemperatureAvgTemperatureFanIntakePcieRatePcieWidthAvgFanPwmAvgFanRpmThrottlingPercentageD3HotEntryCountPerModeD3HotExitCountPerModeArmMsgReceivedCountPerModeApuSTAPMSmartShiftLimitApuSTAPMLimitAvgApuSocketPowerAverageUclkActivity_MAXPublicSerialNumberLowerPublicSerialNumberUpperSmuMetricsSmuMetricsExternal_tGfx_ActiveHystLimitGfx_IdleHystLimitGfx_FPSGfx_MinActiveFreqTypeGfx_BoosterFreqTypePaddingGfxGfx_MinActiveFreqGfx_BoosterFreqGfx_PD_Data_time_constantGfx_PD_Data_limit_aGfx_PD_Data_limit_bGfx_PD_Data_limit_cGfx_PD_Data_error_coeffGfx_PD_Data_error_rate_coeffFclk_ActiveHystLimitFclk_IdleHystLimitFclk_FPSFclk_MinActiveFreqTypeFclk_BoosterFreqTypeFclk_MinActiveFreqFclk_BoosterFreqFclk_PD_Data_time_constantFclk_PD_Data_limit_aFclk_PD_Data_limit_bFclk_PD_Data_limit_cFclk_PD_Data_error_coeffFclk_PD_Data_error_rate_coeffMem_UpThreshold_LimitMem_UpHystLimitMem_DownHystLimitMem_FpsDpmActivityMonitorCoeffInt_tDpmActivityMonitorCoeffIntDpmActivityMonitorCoeffIntExternal_tSMU_13_0_7_ODFEATURE_CAPSMU_13_0_7_ODCAP_GFXCLK_LIMITSSMU_13_0_7_ODCAP_UCLK_LIMITSSMU_13_0_7_ODCAP_POWER_LIMITSMU_13_0_7_ODCAP_FAN_ACOUSTIC_LIMITSMU_13_0_7_ODCAP_FAN_SPEED_MINSMU_13_0_7_ODCAP_TEMPERATURE_FANSMU_13_0_7_ODCAP_TEMPERATURE_SYSTEMSMU_13_0_7_ODCAP_MEMORY_TIMING_TUNESMU_13_0_7_ODCAP_FAN_ZERO_RPM_CONTROLSMU_13_0_7_ODCAP_AUTO_UV_ENGINESMU_13_0_7_ODCAP_AUTO_OC_ENGINESMU_13_0_7_ODCAP_AUTO_OC_MEMORYSMU_13_0_7_ODCAP_FAN_CURVESMU_13_0_7_ODCAP_AUTO_FAN_ACOUSTIC_LIMITSMU_13_0_7_ODCAP_POWER_MODESMU_13_0_7_ODCAP_PER_ZONE_GFX_VOLTAGE_OFFSETSMU_13_0_7_ODCAP_COUNTSMU_13_0_7_ODSETTING_IDSMU_13_0_7_ODSETTING_GFXCLKFMAXSMU_13_0_7_ODSETTING_GFXCLKFMINSMU_13_0_7_ODSETTING_UCLKFMINSMU_13_0_7_ODSETTING_UCLKFMAXSMU_13_0_7_ODSETTING_POWERPERCENTAGESMU_13_0_7_ODSETTING_FANRPMMINSMU_13_0_7_ODSETTING_FANRPMACOUSTICLIMITSMU_13_0_7_ODSETTING_FANTARGETTEMPERATURESMU_13_0_7_ODSETTING_OPERATINGTEMPMAXSMU_13_0_7_ODSETTING_ACTIMINGSMU_13_0_7_ODSETTING_FAN_ZERO_RPM_CONTROLSMU_13_0_7_ODSETTING_AUTOUVENGINESMU_13_0_7_ODSETTING_AUTOOCENGINESMU_13_0_7_ODSETTING_AUTOOCMEMORYSMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_1SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_1SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_2SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_2SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_3SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_3SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_4SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_4SMU_13_0_7_ODSETTING_FAN_CURVE_TEMPERATURE_5SMU_13_0_7_ODSETTING_FAN_CURVE_SPEED_5SMU_13_0_7_ODSETTING_AUTO_FAN_ACOUSTIC_LIMITSMU_13_0_7_ODSETTING_POWER_MODESMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_1SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_2SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_3SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_4SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_5SMU_13_0_7_ODSETTING_PER_ZONE_GFX_VOLTAGE_OFFSET_POINT_6SMU_13_0_7_ODSETTING_COUNTsmu_13_0_7_overdrive_tablefeature_countsetting_countpm_settingsmu_13_0_7_powerplay_tablegolden_pp_idgolden_revisionsmall_power_limit1small_power_limit2boost_power_limitsmc_pptableatom_smc_dpm_info_table_13_0_7amd_fan_ctrl_modeAMD_FAN_CTRL_NONEAMD_FAN_CTRL_MANUALAMD_FAN_CTRL_AUTOsmu_memory_pool_sizeSMU_MEMORY_POOL_SIZE_ZEROSMU_MEMORY_POOL_SIZE_256_MBSMU_MEMORY_POOL_SIZE_512_MBSMU_MEMORY_POOL_SIZE_1_GBSMU_MEMORY_POOL_SIZE_2_GBUSHORTUCHAR_ATOM_COMMON_TABLE_HEADERusStructureSizeucTableFormatRevisionucTableContentRevisionATOM_COMMON_TABLE_HEADERinterrupt_node_id_per_aidAID0_NODEIDXCD0_NODEIDXCD1_NODEIDAID1_NODEIDXCD2_NODEIDXCD3_NODEIDAID2_NODEIDXCD4_NODEIDXCD5_NODEIDAID3_NODEIDXCD6_NODEIDXCD7_NODEIDNODEID_MAXphm_fan_speed_infomin_percentmax_percentmin_rpmmax_rpmsupports_percent_readsupports_percent_writesupports_rpm_readsupports_rpm_writephm_platform_capsPHM_PlatformCaps_AtomBiosPpV1PHM_PlatformCaps_PowerPlaySupportPHM_PlatformCaps_ACOverdriveSupportPHM_PlatformCaps_BacklightSupportPHM_PlatformCaps_ThermalControllerPHM_PlatformCaps_BiosPowerSourceControlPHM_PlatformCaps_DisableVoltageTransitionPHM_PlatformCaps_DisableEngineTransitionPHM_PlatformCaps_DisableMemoryTransitionPHM_PlatformCaps_DynamicPowerManagementPHM_PlatformCaps_EnableASPML0sPHM_PlatformCaps_EnableASPML1PHM_PlatformCaps_OD5inACSupportPHM_PlatformCaps_OD5inDCSupportPHM_PlatformCaps_SoftStateOD5PHM_PlatformCaps_NoOD5SupportPHM_PlatformCaps_ContinuousHardwarePerformanceRangePHM_PlatformCaps_ActivityReportingPHM_PlatformCaps_EnableBackbiasPHM_PlatformCaps_OverdriveDisabledByPowerBudgetPHM_PlatformCaps_ShowPowerBudgetWarningPHM_PlatformCaps_PowerBudgetWaiverAvailablePHM_PlatformCaps_GFXClockGatingSupportPHM_PlatformCaps_MMClockGatingSupportPHM_PlatformCaps_AutomaticDCTransitionPHM_PlatformCaps_GeminiPrimaryPHM_PlatformCaps_MemorySpreadSpectrumSupportPHM_PlatformCaps_EngineSpreadSpectrumSupportPHM_PlatformCaps_StepVddcPHM_PlatformCaps_DynamicPCIEGen2SupportPHM_PlatformCaps_SMCPHM_PlatformCaps_FaultyInternalThermalReadingPHM_PlatformCaps_EnableVoltageControlPHM_PlatformCaps_EnableSideportControlPHM_PlatformCaps_VideoPlaybackEEUNotificationPHM_PlatformCaps_TurnOffPll_ASPML1PHM_PlatformCaps_EnableHTLinkControlPHM_PlatformCaps_PerformanceStateOnlyPHM_PlatformCaps_ExclusiveModeAlwaysHighPHM_PlatformCaps_DisableMGClockGatingPHM_PlatformCaps_DisableMGCGTSSMPHM_PlatformCaps_UVDAlwaysHighPHM_PlatformCaps_DisablePowerGatingPHM_PlatformCaps_CustomThermalPolicyPHM_PlatformCaps_StayInBootStatePHM_PlatformCaps_SMCAllowSeparateSWThermalStatePHM_PlatformCaps_MultiUVDStateSupportPHM_PlatformCaps_EnableSCLKDeepSleepForUVDPHM_PlatformCaps_EnableMCUHTLinkControlPHM_PlatformCaps_ABMPHM_PlatformCaps_KongThermalPolicyPHM_PlatformCaps_SwitchVDDNBPHM_PlatformCaps_ULPSPHM_PlatformCaps_NativeULPSPHM_PlatformCaps_EnableMVDDControlPHM_PlatformCaps_ControlVDDCIPHM_PlatformCaps_DisableDCODTPHM_PlatformCaps_DynamicACTimingPHM_PlatformCaps_EnableThermalIntByGPIOPHM_PlatformCaps_BootStateOnAlertPHM_PlatformCaps_DontWaitForVBlankOnAlertPHM_PlatformCaps_Force3DClockSupportPHM_PlatformCaps_MicrocodeFanControlPHM_PlatformCaps_AdjustUVDPriorityForSPPHM_PlatformCaps_DisableLightSleepPHM_PlatformCaps_DisableMCLSPHM_PlatformCaps_RegulatorHotPHM_PlatformCaps_BACOPHM_PlatformCaps_DisableDPMPHM_PlatformCaps_DynamicM3ArbiterPHM_PlatformCaps_SclkDeepSleepPHM_PlatformCaps_DynamicPatchPowerStatePHM_PlatformCaps_ThermalAutoThrottlingPHM_PlatformCaps_SumoThermalPolicyPHM_PlatformCaps_PCIEPerformanceRequestPHM_PlatformCaps_BLControlledByGPUPHM_PlatformCaps_PowerContainmentPHM_PlatformCaps_SQRampingPHM_PlatformCaps_CACPHM_PlatformCaps_NIChipsetsPHM_PlatformCaps_TrinityChipsetsPHM_PlatformCaps_EvergreenChipsetsPHM_PlatformCaps_PowerControlPHM_PlatformCaps_DisableLSClockGatingPHM_PlatformCaps_BoostStatePHM_PlatformCaps_UserMaxClockForMultiDisplaysPHM_PlatformCaps_RegWriteDelayPHM_PlatformCaps_NonABMSupportInPPLibPHM_PlatformCaps_GFXDynamicMGPowerGatingPHM_PlatformCaps_DisableSMUUVDHandshakePHM_PlatformCaps_DTEPHM_PlatformCaps_W5100Specifc_SmuSkipMsgDTEPHM_PlatformCaps_UVDPowerGatingPHM_PlatformCaps_UVDDynamicPowerGatingPHM_PlatformCaps_VCEPowerGatingPHM_PlatformCaps_SamuPowerGatingPHM_PlatformCaps_UVDDPMPHM_PlatformCaps_VCEDPMPHM_PlatformCaps_SamuDPMPHM_PlatformCaps_AcpDPMPHM_PlatformCaps_SclkDeepSleepAboveLowPHM_PlatformCaps_DynamicUVDStatePHM_PlatformCaps_WantSAMClkWithDummyBackEndPHM_PlatformCaps_WantUVDClkWithDummyBackEndPHM_PlatformCaps_WantVCEClkWithDummyBackEndPHM_PlatformCaps_WantACPClkWithDummyBackEndPHM_PlatformCaps_OD6inACSupportPHM_PlatformCaps_OD6inDCSupportPHM_PlatformCaps_EnablePlatformPowerManagementPHM_PlatformCaps_SurpriseRemovalPHM_PlatformCaps_NewCACVoltagePHM_PlatformCaps_DiDtSupportPHM_PlatformCaps_DBRampingPHM_PlatformCaps_TDRampingPHM_PlatformCaps_TCPRampingPHM_PlatformCaps_DBRRampingPHM_PlatformCaps_DiDtEDCEnablePHM_PlatformCaps_GCEDCPHM_PlatformCaps_PSMPHM_PlatformCaps_EnableSMU7ThermalManagementPHM_PlatformCaps_FPSPHM_PlatformCaps_ACPPHM_PlatformCaps_SclkThrottleLowNotificationPHM_PlatformCaps_XDMAEnabledPHM_PlatformCaps_UseDummyBackEndPHM_PlatformCaps_EnableDFSBypassPHM_PlatformCaps_VddNBDirectRequestPHM_PlatformCaps_PauseMMSessionsPHM_PlatformCaps_UnTabledHardwareInterfacePHM_PlatformCaps_SMU7PHM_PlatformCaps_RevertGPIO5PolarityPHM_PlatformCaps_Thermal2GPIO17PHM_PlatformCaps_ThermalOutGPIOPHM_PlatformCaps_DisableMclkSwitchingForFrameLockPHM_PlatformCaps_ForceMclkHighPHM_PlatformCaps_VRHotGPIOConfigurablePHM_PlatformCaps_TempInversionPHM_PlatformCaps_IOIC3PHM_PlatformCaps_ConnectedStandbyPHM_PlatformCaps_EVVPHM_PlatformCaps_EnableLongIdleBACOSupportPHM_PlatformCaps_CombinePCCWithThermalSignalPHM_PlatformCaps_DisableUsingActualTemperatureForPowerCalcPHM_PlatformCaps_StablePStatePHM_PlatformCaps_OD6PlusinACSupportPHM_PlatformCaps_OD6PlusinDCSupportPHM_PlatformCaps_ODThermalLimitUnlockPHM_PlatformCaps_ReducePowerLimitPHM_PlatformCaps_ODFuzzyFanControlSupportPHM_PlatformCaps_GeminiRegulatorFanControlSupportPHM_PlatformCaps_ControlVDDGFXPHM_PlatformCaps_BBBSupportedPHM_PlatformCaps_DisableVoltageIslandPHM_PlatformCaps_FanSpeedInTableIsRPMPHM_PlatformCaps_GFXClockGatingManagedInCAILPHM_PlatformCaps_IcelandULPSSWWorkAroundPHM_PlatformCaps_FPSEnhancementPHM_PlatformCaps_LoadPostProductionFirmwarePHM_PlatformCaps_VpuRecoveryInProgressPHM_PlatformCaps_Falcon_QuickTransitionPHM_PlatformCaps_AVFSPHM_PlatformCaps_ClockStretcherPHM_PlatformCaps_TablelessHardwareInterfacePHM_PlatformCaps_EnableDriverEVVPHM_PlatformCaps_SPLLShutdownSupportPHM_PlatformCaps_VirtualBatteryStatePHM_PlatformCaps_IgnoreForceHighClockRequestsInAPUsPHM_PlatformCaps_DisableMclkSwitchForVRPHM_PlatformCaps_SMU8PHM_PlatformCaps_VRHotPolarityHighPHM_PlatformCaps_IPS_UlpsExclusivePHM_PlatformCaps_SMCtoPPLIBAcdcGpioSchemePHM_PlatformCaps_GeminiAsymmetricPowerPHM_PlatformCaps_OCLPowerOptimizationPHM_PlatformCaps_MaxPCIEBandWidthPHM_PlatformCaps_PerfPerWattOptimizationSupportPHM_PlatformCaps_UVDClientMCTuningPHM_PlatformCaps_ODNinACSupportPHM_PlatformCaps_ODNinDCSupportPHM_PlatformCaps_OD8inACSupportPHM_PlatformCaps_OD8inDCSupportPHM_PlatformCaps_UMDPStatePHM_PlatformCaps_AutoWattmanSupportPHM_PlatformCaps_AutoWattmanEnable_CCCStatePHM_PlatformCaps_FreeSyncActivePHM_PlatformCaps_EnableShadowPstatePHM_PlatformCaps_customThermalManagementPHM_PlatformCaps_staticFanControlPHM_PlatformCaps_Virtual_SystemPHM_PlatformCaps_LowestUclkReservedForUlvPHM_PlatformCaps_EnableBoostStatePHM_PlatformCaps_AVFSSupportPHM_PlatformCaps_ThermalPolicyDelayPHM_PlatformCaps_CustomFanControlSupportPHM_PlatformCaps_BAMACOPHM_PlatformCaps_MaxPHM_PerformanceLevelDesignationPHM_PerformanceLevelDesignation_ActivityPHM_PerformanceLevelDesignation_PowerContainmentPHM_PerformanceLevelcoreClockmemory_clocknonLocalMemoryFreqnonLocalMemoryWidthPP_ClocksengineClockmemoryClockBusBandwidthengineClockInSRdcefClockdcefClockInSRpp_clock_infomin_mem_clkmax_mem_clkmin_eng_clkmax_eng_clkphm_platform_descriptorplatformCapsvbiosInterruptIdoverdriveLimitclockStephardwareActivityPerformanceLevelsminimumClocksReductionPercentageminOverdriveVDDCmaxOverdriveVDDCoverdriveVDDCStephardwarePerformanceLevelspowerBudgetTDPLimitnearTDPLimitnearTDPLimitAdjustedSQRampingThresholdCACLeakageTDPODLimitTDPAdjustmentTDPAdjustmentPolarityLoadLineSlopeVidMinLimitVidMaxLimitVidStepVidAdjustmentVidAdjustmentPolaritypp_hw_power_statePP_StateLinkedListpp_power_stateorderedListallStatesListtemperaturesPP_StateUILabelPP_StateUILabel_NonePP_StateUILabel_BatteryPP_StateUILabel_MiddleLowPP_StateUILabel_BalancedPP_StateUILabel_MiddleHighPP_StateUILabel_PerformancePP_StateUILabel_BACOPP_StateClassificationFlagPP_StateClassificationFlag_BootPP_StateClassificationFlag_ThermalPP_StateClassificationFlag_LimitedPowerSourcePP_StateClassificationFlag_RestPP_StateClassificationFlag_ForcedPP_StateClassificationFlag_User3DPerformancePP_StateClassificationFlag_User2DPerformancePP_StateClassificationFlag_3DPerformancePP_StateClassificationFlag_ACOverdriveTemplatePP_StateClassificationFlag_UvdPP_StateClassificationFlag_3DPerformanceLowPP_StateClassificationFlag_ACPIPP_StateClassificationFlag_HD2PP_StateClassificationFlag_UvdHDPP_StateClassificationFlag_UvdSDPP_StateClassificationFlag_UserDCPerformancePP_StateClassificationFlag_DCOverdriveTemplatePP_StateClassificationFlag_BACOPP_StateClassificationFlag_LimitedPowerSource_2PP_StateClassificationFlag_ULVPP_StateClassificationFlag_UvdMVCPP_StateClassificationBlockPP_StatePcieBlockPP_RefreshrateSourcePP_RefreshrateSource_EDIDPP_RefreshrateSource_ExplicitPP_StateDisplayBlockdisableFrameModulationlimitRefreshraterefreshrateSourceexplicitRefreshrateedidRefreshrateIndexenableVariBrightPP_StateMemroyBlockdllOffPP_StateSoftwareAlgorithmBlockdisableLoadBalancingenableSleepForTimestampsPP_TemperatureRangePP_StateValidationBlocksingleDisplayOnlydisallowOnDCsupportedPowerLevelsPP_UVD_CLOCKSVCLKDCLKBACO_STATEBACO_STATE_OUTBACO_STATE_INphm_clock_arrayphm_clock_voltage_dependency_recordphm_clock_voltage_dependency_tablephm_phase_shedding_limits_recordSclkMclkphm_uvd_clock_voltage_dependency_recordphm_uvd_clock_voltage_dependency_tablephm_acp_clock_voltage_dependency_recordacpclkphm_acp_clock_voltage_dependency_tablephm_vce_clock_voltage_dependency_recordphm_phase_shedding_limits_tablephm_vce_clock_voltage_dependency_tableSMU_ASIC_RESET_MODESMU_ASIC_RESET_MODE_0SMU_ASIC_RESET_MODE_1SMU_ASIC_RESET_MODE_2pp_smumgr_funcsmu_initsmu_finistart_smucheck_fw_load_finishrequest_smu_load_fwrequest_smu_load_specific_fwget_argumentsend_msg_to_smcsend_msg_to_smc_with_parameterdownload_pptable_settingsupload_pptable_settingsupdate_smc_tableprocess_firmware_headerupdate_sclk_thresholdthermal_setup_fan_tablethermal_avfs_enableinit_smc_tablepopulate_all_graphic_levelspopulate_all_memory_levelsinitialize_mc_reg_tableget_offsetofget_mac_definitionis_hw_avfs_presentupdate_dpm_settingssmc_table_managerstop_smcpp_hwmgrsmu_versionnot_vfpm_enpp_one_vfmsg_lockpp_table_versionsmumgrsoft_pp_tablesoft_pp_table_sizehardcode_pp_tableneed_pp_table_uploadnum_vce_state_tablesrequest_dpm_levelpptableplatform_descriptorbackendsmu_backendsmumgr_funcsdal_power_levelhwmgr_funcpptable_functhermal_controllerfan_ctrl_is_in_default_modefan_ctrl_default_m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PStateChangeAndVoltageMPCCombineMethodAsPossibleFullFrameMALLPStateMethodSubViewportMALLPStateMethodPhantomPipeMALLPStateMethodNoChromaTotalAvailablePipesSupportNoDSCTotalAvailablePipesSupportDSCODMModeNoDSCODMModeDSCRequiredDISPCLKPerSurfaceNoDSCRequiredDISPCLKPerSurfaceDSCBWOfNonCombinedSurfaceOfMaximumBandwidthVMDataOnlyReturnBWPerStatedummy_varsvba_vars_stmaxMpcCombUseMaximumVStartupMaxVRatioPreWritebackDISPCLKDPPCLKUsingSingleDPPLumaDPPCLKUsingSingleDPPChromaDISPCLKWithRampingDISPCLKWithoutRampingGlobalDPPCLKDISPCLKWithRampingRoundedToDFSGranularityDISPCLKWithoutRampingRoundedToDFSGranularityMaxDispclkRoundedToDFSGranularityDCCEnabledAnyPlaneReturnBandwidthToDCNTotalActiveDPPTotalDCCActiveDPPUrgentRoundTripAndOutOfOrderLatencyStutterPeriodFrameTimeForMinFullDETBufferingTimeAverageReadBandwidthTotalRowReadBandwidthPartOfBurstThatFitsInROBStutterBurstTimeNextPrefetchModeNextMaxVStartupVBlankTimeSmallestVBlankAllowForPStateChangeOrStutterInVBlankFinalDCFCLKDeepSleepPerPlaneEffectiveDETPlusLBLinesLumaEffectiveDETPlusLBLinesChromaUrgentLatencySupportUsLumaUrgentLatencySupportUsChromaDSCFormatFactorDummyPStateCheckDRAMClockChangeSupportsVActivePrefetchModeSupportedPrefetchAndImmediateFlipSupportedAllowDRAMSelfRefreshOrDRAMClockChangeInVblankXFCRemoteSurfaceFlipDelayTInitXFillTslvChkSrcActiveDrainRateImmediateFlipSupportedWhenToDoMPCCombinePrefetchERRORVStartupLinesActiveDPPsLBLatencyHidingSourceLinesYLBLatencyHidingSourceLinesCActiveDRAMClockChangeLatencyMarginPerStateActiveDRAMClockChangeLatencyMarginCachedActiveDRAMClockChangeLatencyMarginMinActiveDRAMClockChangeMarginInitFillLevelFinalFillMarginFinalFillLevelRemainingFillLevelTFinalxFillUrgentLatencyPixelDataOnlyUrgentLatencyPixelMixedWithVMDataUrgentLatencyVMDataOnlyMALLAllocatedForDCNFinalMaxAveragePercentOfIdealFabricBWDisplayCanUseInNormalSystemOperationMaxAveragePercentOfIdealDRAMBWDisplayCanUseInNormalSystemOperationSTROBEPercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBEPercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnlyPercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMDataPercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnlyMaxAveragePercentOfIdealSDPPortBWDisplayCanUseInNormalSystemOperationMaxAveragePercentOfIdealDRAMBWDisplayCanUseInNormalSystemOperationNumberOfChannelsDRAMChannelWidthFabricDatapathToDCNDataReturnReturnBusWidthDownspreadingDISPCLKDPPCLKDSCCLKDownSpreadingDISPCLKDPPCLKVCOSpeedRoundTripPingLatencyCyclesUrgentOutOfOrderReturnPerChannelUrgentOutOfOrderReturnPerChannelPixelDataOnlyUrgentOutOfOrderReturnPerChannelPixelMixedWithVMDataUrgentOutOfOrderReturnPerChannelVMDataOnlyVMMPageSizeXFCBusTransportTimeUseUrgentBurstBandwidthXFCXBUFLatencyToleranceROBBufferSizeInKByteDETBufferSizeInKByteDETBufferSizeInTimeDPPOutputBufferPixelsOPPOutputBufferLinesPixelChunkSizeInKByteReturnBWGPUVMEnableHostVMEnableGPUVMMaxPageTableLevelsHostVMMaxPageTableLevelsHostVMCachedPageTableLevelsOverrideGPUVMPageTableLevelsOverrideHostVMPageTableLevelsMetaChunkSizeMinMetaChunkSizeBytesWritebackChunkSizeODMCapabilityNumberOfDSCLineBufferSizeMaxLineBufferLinesWritebackInterfaceLumaBufferSizeWritebackInterfaceChromaBufferSizeWritebackChromaLineBufferWidthWritebackConfigurationMaxDCHUBToPSCLThroughputMaxPSCLToLBThroughputPTEBufferSizeInRequestsLumaPTEBufferSizeInRequestsChromaDISPCLKRampingMarginMaxInterDCNTileRepeatersXFCSupportedXFCSlvChunkSizeXFCFillBWOverheadXFCFillConstantXFCTSlvVupdateOffsetXFCTSlvVupdateWidthXFCTSlvVreadyOffsetDPPCLKDelaySubtotalDPPCLKDelaySCLDPPCLKDelaySCLLBOnlyDPPCLKDelayCNVCFormaterDPPCLKDelayCNVCCursorDISPCLKDelaySubtotalCompressedBufferSegmentSizeInkByteFinalCompbufReservedSpace64BCompbufReservedSpaceZsLineBufferSizeFinalMaximumPixelsPerLinePerDSCUnitAlphaPixelChunkSizeInKByteMinPixelChunkSizeBytesDCCMetaBufferSizeBytesVoltageLevelFabricClockDRAMSpeedDISPCLKSOCCLKDCFCLKMaxTotalDETInKByteMinCompressedBufferSizeInKByteNumberOfActiveSurfacesRefreshRateOutputBPPGPUVMMinPageSizeKBytesSynchronizeTimingsFinalSynchronizeDRRDisplaysForUCLKPStateChangeFinalForceOneRowForFrameViewportXStartYDRRDisplayPteBufferModeOutputTypeOutputRateNumberOfActivePlanesNumberOfDSCSlicesViewportWidthViewportYStartYHRatioHTAPsChromaVTAPsChromaVTotalVTotal_MaxVTotal_MinDPPPerPlanePixelClockBackEndFECEnableSourceScanWritebackEnableActiveWritebacksPerPlaneWritebackDestinationWidthWritebackDestinationHeightWritebackSourceHeightWritebackPixelFormatWritebackLumaHTapsWritebackLumaVTapsWritebackChromaHTapsWritebackChromaVTapsWritebackHRatioWritebackVRatioVActiveInterlaceScalerRecoutWidthDynamicMetadataEnableDynamicMetadataLinesBeforeActiveRequiredDynamicMetadataTransmittedBytesDCCRateAverageDCCCompressionRateODMCombineEnabledOutputBppDSCEnabledDSCInputBitPerComponentOutputFormatOutputskip_dio_checkBlendingAndTimingSynchronizedVBlankCursorWidthCursorBPPXFCEnabledVBlankNomDisableUnboundRequestIfCompBufReservedSpaceNeedAdjustmentImmediateFlipSupportDETBufferSizeYDETBufferSizeCLBBitPerPixelLastPixelOfLineExtraWatermarkTotalDataReadBandwidthTotalActiveWritebackEffectiveLBLatencyHidingSourceLinesLumaEffectiveLBLatencyHidingSourceLinesChromaBandwidthAvailableForImmediateFlipPrefetchModePrefetchModePerStateMinPrefetchModeMaxPrefetchModeAnyLinesForVMOrRowTooLargeMaxVStartupIgnoreViewportPositioningErrorResultDCFCLKDeepSleepUrgentExtraLatencyStutterEfficiencyStutterEfficiencyNotIncludingVBlankNonUrgentLatencyToleranceMinActiveDRAMClockChangeLatencySupportedZ8StutterEfficiencyBestCaseZ8NumberOfStutterBurstsPerFrameBestCaseZ8StutterEfficiencyNotIncludingVBlankBestCaseStutterPeriodBestCaseWatermarkDCHUBBUB_ARB_CSTATE_MAX_CAP_MODECompBufReservedSpaceKBytesCompBufReservedSpace64BCompBufReservedSpaceZsCompBufReservedSpaceNeedAdjustmentDISPCLK_calculatedDPPCLK_calculatedImmediateFlipSupportedSurfaceUse_One_Row_For_FrameUse_One_Row_For_Frame_FlipVUpdateOffsetPixVUpdateWidthPixVReadyOffsetPixTotImmediateFlipBytesTCalccache_pipescache_num_pipespipe_planeSupportGFX7CompatibleTilingIn32bppAnd64bppMaxHSCLRatioMaxVSCLRatioMaxNumWritebackWritebackLumaAndChromaScalingSupportedCursor64BppSupportDCFCLKPerStateDCFCLKStateFabricClockPerStateSOCCLKPerStatePHYCLKPerStateDTBCLKPerStateMaxDppclkMaxDSCCLKDRAMSpeedPerStateMaxDispclkVoltageOverrideLevelPHYCLKD32PerStateScaleRatioAndTapsSupportSourceFormatPixelAndScanSupportTotalBandwidthConsumedGBytePerSecondDCCEnabledInAnyPlaneWritebackLatencySupportWritebackModeSupportWriteback10bpc420SupportedBandwidthSupportTotalNumberOfActiveWritebackCriticalPointReturnBWToDCNPerStateIsErrorResultprefetch_vm_bw_validprefetch_row_bw_validNumberOfOTGSupportNonsupportedDSCInputBPCWritebackScaleRatioAndTapsSupportCursorSupportPitchSupportValidationStatusP2IWith420DSCOnlyIfNecessaryWithBPPDSC422NativeNotSupportedLinkRateDoesNotMatchDPVersionLinkRateForMultistreamNotIndicatedBPPForMultistreamNotIndicatedMultistreamWithHDMIOreDPMSOOrODMSplitWithNonDPLinkNotEnoughLanesForMSOViewportExceedsSurfaceImmediateFlipRequiredButTheRequirementForEachSurfaceIsNotSpecifiedImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipeInvalidCombinationOfMALLUseForPStateAndStaticScreenInvalidCombinationOfMALLUseForPStateOutputLinkDPRatePrefetchLinesYThisStatePrefetchLinesCThisStatemeta_row_bandwidth_this_statedpte_row_bandwidth_this_stateDPTEBytesPerRowThisStatePDEAndMetaPTEBytesPerFrameThisStateMetaRowBytesThisStateuse_one_row_for_frameuse_one_row_for_frame_flipuse_one_row_for_frame_this_stateuse_one_row_for_frame_flip_this_stateOutputTypeAndRatePerStateRequiredDISPCLKPerSurfaceMacroTileHeightYMacroTileHeightCMacroTileWidthYMacroTileWidthCImmediateFlipRequiredFinalDCCProgrammingAssumesScanDirectionUnknownFinalEnoughWritebackUnitsODMCombine2To1SupportCheckOKNumberOfDP2p0SupportMaxNumDP2p0StreamsMaxNumDP2p0OutputsOutputTypePerStateOutputRatePerStateWritebackLineBufferLumaBufferSizeWritebackLineBufferChromaBufferSizeWritebackMinHSCLRatioWritebackMinVSCLRatioWritebackMaxHSCLRatioWritebackMaxVSCLRatioWritebackMaxHSCLTapsWritebackMaxVSCLTapsMaxNumDPPMaxNumOTGCursorBufferSizeCursorChunkSizeModeOutputLinkDPLanesForcedOutputLinkBPPImmediateFlipBWMaxMaxVStartupWritebackLumaVExtraWritebackChromaVExtraWritebackRequiredDISPCLKMaximumSwathWidthSupportMaximumSwathWidthInDETBufferMaximumSwathWidthInLineBufferMaxDispclkRoundedDownToDFSGranularityMaxDppclkRoundedDownToDFSGranularityPlaneRequiredDISPCLKWithoutODMCombinePlaneRequiredDISPCLKWithODMCombinePlaneRequiredDISPCLKFECOverheadEffectiveFECOverheadOutbppOutbppDSCslicesSwathWidthGranularityYRoundedUpMaxSwathSizeBytesYSwathWidthGranularityCRoundedUpMaxSwathSizeBytesCEffectiveDETLBLinesLumaEffectiveDETLBLinesChromaProjectedDCFCLKDeepSleepPDEAndMetaPTEBytesPerFrameYPDEAndMetaPTEBytesPerFrameCMetaRowBytesYMetaRowBytesCDPTEBytesPerRowCDPTEBytesPerRowYTimeCalcTWaitMaximumReadBandwidthWithPrefetchMaximumReadBandwidthWithoutPrefetchtotal_dcn_read_bw_with_fliptotal_dcn_read_bw_with_flip_no_urgent_burstFractionOfUrgentBandwidthFractionOfUrgentBandwidthImmediateFlipIdealSDPPortBandwidthPerStateNoOfDPPNoOfDPPThisStateODMCombineEnablePerStateSwathWidthYThisStateSwathHeightCPerStateSwathHeightYThisStateSwathHeightCThisStateVRatioPreYVRatioPreCRequiredPrefetchPixelDataBWLumaRequiredPrefetchPixelDataBWChromaRequiredDPPCLKRequiredDPPCLKThisStatePTEBufferSizeNotExceededYPTEBufferSizeNotExceededCBandwidthWithoutPrefetchSupportedPrefetchSupportedVRatioInPrefetchSupportedRequiredDISPCLKDISPCLK_DPPCLK_SupportTotalAvailablePipesSupportTotalNumberOfActiveDPPTotalNumberOfDCCActiveDPPModeSupportReturnBWPerStateDIOSupportNotEnoughDSCUnitsDSCCLKRequiredMoreThanSupportedDTBCLKRequiredMoreThanSupportedUrgentRoundTripAndOutOfOrderLatencyPerStateROBSupportDCCMetaBufferSizeSupportPTEBufferSizeNotExceededTotalVerticalActiveBandwidthSupportMaxTotalVerticalActiveAvailableBandwidthPrefetchBWPDEAndMetaPTEBytesPerFrameMetaRowBytesDPTEBytesPerRowPrefetchLinesYPrefetchLinesCMaxNumSwYMaxNumSwCPrefillYPrefillCLineTimesForPrefetchLinesForMetaPTELinesForMetaAndDPTERowMinDPPCLKUsingSingleDPPSwathWidthYSingleDPPBytePerPixelInDETYBytePerPixelInDETCRequiresDSCNumberOfDSCSliceRequiresFECOutputBppPerStateDSCDelayPerStateViewportSizeSupportRead256BlockHeightYRead256BlockWidthYRead256BlockHeightCRead256BlockWidthCMaxSwathHeightYMaxSwathHeightCMinSwathHeightYMinSwathHeightCReadBandwidthLumaReadBandwidthChromaReadBandwidthWriteBandwidthPSCL_FACTORPSCL_FACTOR_CHROMAMaximumVStartupAlignedDCCMetaPitchAlignedYPitchAlignedCPitchMaximumSwathWidthcursor_bwcursor_bw_preTno_bwprefetch_vmrow_bwDestinationLinesToRequestVMInImmediateFlipDestinationLinesToRequestRowInImmediateFlipfinal_flip_bwImmediateFlipSupportedForStateWritebackDelayvm_group_bytesmeta_req_heightmeta_req_widthmeta_row_widthdpte_row_height_chromameta_req_height_chromameta_req_width_chromameta_row_height_chromameta_row_width_chromaImmediateFlipSupportedForPipemeta_row_bwdpte_row_bwDisplayPipeLineDeliveryTimeLumaDisplayPipeLineDeliveryTimeChromaDisplayPipeRequestDeliveryTimeLumaDisplayPipeRequestDeliveryTimeChromaDRAMClockChangeSupportUrgentBurstFactorCursorUrgentBurstFactorCursorPreUrgentBurstFactorLumaUrgentBurstFactorLumaPreUrgentBurstFactorChromaUrgentBurstFactorChromaPreMPCCombineSwathWidthCSingleDPPMaximumSwathWidthInLineBufferLumaMaximumSwathWidthInLineBufferChromaMaximumSwathWidthLumaMaximumSwathWidthChromaodm_combine_dummydummy5dummy6dummy7dummy8dummy13dummyinteger3dummyinteger4dummyinteger5dummyinteger6dummyinteger7dummyinteger8dummyinteger9dummyinteger10dummyinteger11dummysinglestringSingleDPPViewportSizeSupportPerPlanePlaneRequiredDISPCLKWithODMCombine2To1PlaneRequiredDISPCLKWithODMCombine4To1TotalNumberOfSingleDPPPlanesLinkDSCEnableODMCombine4To1SupportCheckOKODMCombineEnableThisStateSwathWidthCThisStateViewportSizeSupportPerPlaneAlignedDCCMetaPitchYAlignedDCCMetaPitchCNotEnoughUrgentLatencyHidingNotEnoughUrgentLatencyHidingPrePTEBufferSizeInRequestsForLumaPTEBufferSizeInRequestsForChromadpte_group_bytes_chromavm_group_bytes_chromadst_x_after_scalerVStartupRequiredWhenNotEnoughTimeForDynamicMetadataPrefetchBandwidthVInitPreFillYVInitPreFillCMaxNumSwathYMaxNumSwathCVStartupAllowDRAMClockChangeDuringVBlankAllowDRAMSelfRefreshDuringVBlankVRatioPrefetchYVRatioPrefetchCDestinationLinesForPrefetchDestinationLinesToRequestVMInVBlankDestinationLinesToRequestRowInVBlankMinTTUVBlankBytePerPixelDETYBytePerPixelDETCSwathWidthYSwathWidthSingleDPPYCursorRequestDeliveryTimeCursorRequestDeliveryTimePrefetchReadBandwidthPlaneLumaReadBandwidthPlaneChromaDisplayPipeLineDeliveryTimeLumaPrefetchDisplayPipeLineDeliveryTimeChromaPrefetchDisplayPipeRequestDeliveryTimeLumaPrefetchDisplayPipeRequestDeliveryTimeChromaPrefetchPixelPTEBytesPerRowPDEAndMetaPTEBytesFrameMetaRowBytePrefetchSourceLinesYRequiredPrefetchPixDataBWLumaRequiredPrefetchPixDataBWChromaPrefetchSourceLinesCPSCL_THROUGHPUT_LUMAPSCL_THROUGHPUT_CHROMADSCCLK_calculatedDSCDelayMaxVStartupLinesDPPCLKUsingSingleDPPDPPCLKDCCYMaxUncompressedBlockDCCYMaxCompressedBlockDCCYIndependent64ByteBlockMaximumDCCCompressionYSurfaceXFCSlaveVUpdateOffsetXFCSlaveVupdateWidthXFCSlaveVReadyOffsetXFCTransferDelayXFCPrechargeDelayXFCRemoteSurfaceFlipLatencyXFCPrefetchMargindpte_row_width_luma_ubdpte_row_width_chroma_ubFullDETBufferingTimeYFullDETBufferingTimeCDST_Y_PER_PTE_ROW_NOM_LDST_Y_PER_PTE_ROW_NOM_CDST_Y_PER_META_ROW_NOM_LTimePerMetaChunkNominalTimePerMetaChunkVBlankTimePerMetaChunkFlipswath_width_luma_ubswath_width_chroma_ubPixelPTEReqWidthYPixelPTEReqHeightYPTERequestSizeYPixelPTEReqWidthCPixelPTEReqHeightCPTERequestSizeCtime_per_pte_group_nom_lumatime_per_pte_group_nom_chromatime_per_pte_group_vblank_lumatime_per_pte_group_vblank_chromatime_per_pte_group_flip_lumatime_per_pte_group_flip_chromaTimePerVMGroupVBlankTimePerVMGroupFlipTimePerVMRequestVBlankTimePerVMRequestFlipdpde0_bytes_per_frame_ub_lmeta_pte_bytes_per_frame_ub_ldpde0_bytes_per_frame_ub_cmeta_pte_bytes_per_frame_ub_cLinesToFinishSwathTransferStutterCriticalPlaneBytePerPixelYCriticalPlaneSwathWidthYCriticalPlaneLinesInDETYLinesInDETYRoundedDownToSwathSwathWidthSingleDPPCSwathWidthCdummyinteger1dummyinteger2FinalDRAMClockChangeLatencyTdmdl_vmTdmdlTSetupThisVStartupWritebackAllowDRAMClockChangeEndPositionDST_Y_PER_META_ROW_NOM_CTimePerChromaMetaChunkNominalTimePerChromaMetaChunkVBlankTimePerChromaMetaChunkFlipDCCCMaxUncompressedBlockDCCCMaxCompressedBlockVStartupMarginNotEnoughTimeForDynamicMetadataMaximumMaxVStartupLinesFabricAndDRAMBandwidthLinesInDETLumaLinesInDETChromaImmediateFlipBytesLinesInDETCLinesInDETCRoundedDownToSwathUrgentLatencySupportUsPerStateUrgentLatencySupportUsFabricAndDRAMBandwidthPerStateUrgentLatencySupportSwathWidthYPerStateSwathHeightYPerStatequal_row_bwprefetch_row_bwprefetch_vm_bwPTEGroupSizePDEProcessingBufIn64KBReqsDoUrgentLatencyAdjustmentUrgentLatencyAdjustmentFabricClockComponentUrgentLatencyAdjustmentFabricClockReferenceMinUrgentLatencySupportUsMinFullDETBufferingTimeAverageReadBandwidthGBytePerSecondFirstMainPlaneNotEnoughDETSwathFillLatencyHidingViewportWidthChromaHRatioChromaWritebackSourceWidthModeIsSupportedODMCombine4To1SupportedSurfaceWidthYSurfaceWidthCSurfaceHeightYSurfaceHeightCWritebackHTapsWritebackVTapsDSCEnableDRAMClockChangeLatencyOverrideGPUVMMinPageSizeHostVMMinPageSizeMPCCombineEnableHostVMMaxNonCachedPageTableLevelsDynamicMetadataVMEnabledWritebackInterfaceBufferSizeWritebackLineBufferSizeDCCRateLumaDCCRateChromaPHYCLKD18PerStateWritebackSupportInterleaveAndUsingWholeBufferForASingleStreamNumberOfHDMIFRLSupportMaxNumHDMIFRLOutputsAudioSampleRateAudioSampleLayoutPercentMarginOverMinimumRequiredDCFCLKDynamicMetadataSupportedImmediateFlipRequirementDETBufferSizeYThisStateDETBufferSizeCThisStateNoUrgentLatencyHidingNoUrgentLatencyHidingPreswath_width_luma_ub_this_stateswath_width_chroma_ub_this_stateUrgLatencyVActiveCursorBandwidthVActivePixelBandwidthNoTimeForPrefetchNoTimeForDynamicMetadatadpte_row_bandwidthmeta_row_bandwidthDETBufferSizeYAllStatesDETBufferSizeCAllStatesswath_width_luma_ub_all_statesswath_width_chroma_ub_all_statesNotUrgentLatencyHidingSwathHeightYAllStatesSwathHeightCAllStatesSwathWidthYAllStatesSwathWidthCAllStatesTotalDPTERowBandwidthTotalMetaRowBandwidthTotalVActiveCursorBandwidthTotalVActivePixelBandwidthWritebackDelayTimeDCCYIndependentBlockDCCCIndependentBlockdummyinteger17dummyinteger18dummyinteger19dummyinteger20dummyinteger21dummyinteger22dummyinteger23dummyinteger24dummyinteger25dummyinteger26dummyinteger27dummyinteger28dummyinteger29dummystringBPPODMCombinePolicyUseMinimumRequiredDCFCLKClampMinDCFCLKAllowDramClockChangeOneDisplayVactiveMaxAveragePercentOfIdealFabricAndSDPPortBWDisplayCanUseInNormalSystemOperationPercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatencyPercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelMixedWithVMDataPercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnlyPercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnlyZ8StutterEfficiencyNotIncludingVBlankZ8StutterEfficiencyDCCFractionOfZeroSizeRequestsLumaDCCFractionOfZeroSizeRequestsChromaUrgBurstFactorCursorUrgBurstFactorLumaUrgBurstFactorChromaUrgBurstFactorCursorPreUrgBurstFactorLumaPreUrgBurstFactorChromaPreNotUrgentLatencyHidingPreLinkCapacitySupportVREADY_AT_OR_AFTER_VSYNCMIN_DST_Y_NEXT_STARTVFrontPorchConfigReturnBufferSizeInKByteUseUnboundedRequestingCompressedBufferSegmentSizeInkByteCompressedBufferSizeInkByteMetaFIFOSizeInKEntriesZeroSizeBufferEntriesCOMPBUF_RESERVED_SPACE_64BCOMPBUF_RESERVED_SPACE_ZSUnboundedRequestEnabledDSC422NativeSupportNoEnoughUrgentLatencyHidingNoEnoughUrgentLatencyHidingPreNumberOfStutterBurstsPerFrameZ8NumberOfStutterBurstsPerFrameMaximumDSCBitsPerComponentNotEnoughUrgentLatencyHidingAReadBandwidthSurfaceLumaReadBandwidthSurfaceChromaSurfaceRequiredDISPCLKWithoutODMCombineSurfaceRequiredDISPCLKMinActiveFCLKChangeLatencySupportedMinVoltageLevelMaxVoltageLevelTotalNumberOfSingleDPPSurfacesCompressedBufferSizeInkByteAllStatesDETBufferSizeInKByteAllStatesDETBufferSizeInKByteThisStateSurfaceSizeInMALLExceededMALLSizePTE_BUFFER_MODEBIGK_FRAGMENT_SIZECompressedBufferSizeInkByteThisStateFCLKChangeSupportUSRRetrainingSupportUsesMALLForPStateChangeUnboundedRequestEnabledAllStatesSingleDPPViewportSizeSupportPerSurfaceUseMALLForStaticScreenUnboundedRequestEnabledThisStateDRAMClockChangeRequirementFinalFCLKChangeRequirementFinalUSRRetrainingRequiredFinalDETSizeOverridenomDETInKByteMPCCombineUseMPCCombineMethodIncompatibleRequiredSlotsExceededMultistreamSlotsODMUseOutputMultistreamIdOutputMultistreamEnUsesMALLForStaticScreenMaxActiveDRAMClockChangeLatencySupportedWritebackAllowFCLKChangeEndPositionPTEBufferSizeNotExceededPerStateDCCMetaBufferSizeNotExceededPerStateNotEnoughDSCSlicesPixelsPerLinePerDSCUnitSupportDCCMetaBufferSizeNotExceededdpte_row_height_lineardpte_row_height_linear_chromaSubViewportLinesNeededInMALLVActiveBandwithSupportNotEnoughDETSwathFillLatencyHidingPerStatedml_projectDML_PROJECT_UNDEFINEDDML_PROJECT_RAVEN1DML_PROJECT_NAVI10DML_PROJECT_NAVI10v2DML_PROJECT_DCN201DML_PROJECT_DCN21DML_PROJECT_DCN30DML_PROJECT_DCN31DML_PROJECT_DCN315DML_PROJECT_DCN314DML_PROJECT_DCN32dml_funcsrq_dlg_get_dlg_regrq_dlg_get_rq_regrq_dlg_get_dlg_reg_v2rq_dlg_get_rq_reg_v2display_mode_libprojectvbadml_pipe_statevalidate_max_statedml2_soc_mall_infocache_line_size_bytescache_num_waysmax_cab_allocation_bytesmblk_width_pixelsmblk_size_bytesmblk_height_4bpe_pixelsmblk_height_8bpe_pixelsdml2_dc_callbacksbuild_scaling_paramscan_support_mclk_switch_using_fw_based_vblank_stretchacquire_secondary_pipe_for_mpc_odmupdate_pipes_for_stream_with_slice_countupdate_pipes_for_plane_with_slice_countget_odm_slice_indexget_mpc_slice_indexget_opp_headdml2_dc_svp_callbackscreate_phantom_streamcreate_phantom_planeadd_phantom_streamadd_phantom_planeremove_phantom_planeremove_phantom_streamrelease_phantom_planerelease_phantom_streamrelease_dscget_pipe_subvp_typeget_stream_subvp_typeget_paired_subvp_streamresource_contextis_stream_enc_acquiredis_audio_acquiredclock_source_ref_countdp_clock_source_ref_countis_dsc_acquiredlink_enc_cfg_ctxis_hpo_dp_stream_enc_acquiredhpo_dp_link_enc_to_link_idxhpo_dp_link_enc_ref_cntsis_mpc_3dlut_acquiredtemp_pipedisplay_stream_compressord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M_RGAM_LUT_WRITE_EN_MASKCM_RGAM_LUT_WRITE_SELCM_RGAM_LUT_INDEXCM_RGAM_RAMB_EXP_REGION_START_BCM_RGAM_RAMB_EXP_REGION_START_SEGMENT_BCM_RGAM_RAMB_EXP_REGION_START_GCM_RGAM_RAMB_EXP_REGION_START_SEGMENT_GCM_RGAM_RAMB_EXP_REGION_START_RCM_RGAM_RAMB_EXP_REGION_START_SEGMENT_RCM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_BCM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_GCM_RGAM_RAMB_EXP_REGION_LINEAR_SLOPE_RCM_RGAM_RAMB_EXP_REGION_END_BCM_RGAM_RAMB_EXP_REGION_END_SLOPE_BCM_RGAM_RAMB_EXP_REGION_END_BASE_BCM_RGAM_RAMB_EXP_REGION_END_GCM_RGAM_RAMB_EXP_REGION_END_SLOPE_GCM_RGAM_RAMB_EXP_REGION_END_BASE_GCM_RGAM_RAMB_EXP_REGION_END_RCM_RGAM_RAMB_EXP_REGION_END_SLOPE_RCM_RGAM_RAMB_EXP_REGION_END_BASE_RCM_RGAM_RAMB_EXP_REGION0_LUT_OFFSETCM_RGAM_RAMB_EXP_REGION0_NUM_SEGMENTSCM_RGAM_RAMB_EXP_REGION1_LUT_OFFSETCM_RGAM_RAMB_EXP_REGION1_NUM_SEGMENTSCM_RGAM_RAMB_EXP_REGION32_LUT_OFFSETCM_RGAM_RAMB_EXP_REGION32_NUM_SEGMENTSCM_RGAM_RAMB_EXP_REGION33_LUT_OFFSETCM_RGAM_RAMB_EXP_REGION33_NUM_SEGMENTSCM_RGAM_RAMA_EXP_REGION_START_BCM_RGAM_RAMA_EXP_REGION_START_SEGMENT_BCM_RGAM_RAMA_EXP_REGION_START_GCM_RGAM_RAMA_EXP_REGION_START_SEGMENT_GCM_RGAM_RAMA_EXP_REGION_START_RCM_RGAM_RAMA_EXP_REGION_START_SEGMENT_RCM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_BCM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_GCM_RGAM_RAMA_EXP_REGION_LINEAR_SLOPE_RCM_RGAM_RAMA_EXP_REGION_END_BCM_RGAM_RAMA_EXP_REGION_END_SLOPE_BCM_RGAM_RAMA_EXP_REGION_END_BASE_BCM_RGAM_RAMA_EXP_REGION_END_GCM_RGAM_RAMA_EXP_REGION_END_SLOPE_GCM_RGAM_RAMA_EXP_REGION_END_BASE_GCM_RGAM_RAMA_EXP_REGION_END_RCM_RGAM_RAMA_EXP_REGION_END_SLOPE_RCM_RGAM_RAMA_EXP_REGION_END_BASE_RCM_RGAM_RAMA_EXP_REGION0_LUT_OFFSETCM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTSCM_RGAM_RAMA_EXP_REGION1_LUT_OFFSETCM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTSCM_RGAM_RAMA_EXP_REGION32_LUT_OFFSETCM_RGAM_RAMA_EXP_REGION32_NUM_SEGMENTSCM_RGAM_RAMA_EXP_REGION33_LUT_OFFSETCM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTSCM_RGAM_LUT_MODECM_CMOUT_ROUND_TRUNC_MODECM_BLNDGAM_LUT_MODECM_BLNDGAM_RAMB_EXP_REGION_START_BCM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_BCM_BLNDGAM_RAMB_EXP_REGION_START_GCM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_GCM_BLNDGAM_RAMB_EXP_REGION_START_RCM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_RCM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_BCM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_GCM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_RCM_BLNDGAM_RAMB_EXP_REGION_END_BCM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_BCM_BLNDGAM_RAMB_EXP_REGION_END_BASE_BCM_BLNDGAM_RAMB_EXP_REGION_END_GCM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_GCM_BLNDGAM_RAMB_EXP_REGION_END_BASE_GCM_BLNDGAM_RAMB_EXP_REGION_END_RCM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_RCM_BLNDGAM_RAMB_EXP_REGION_END_BASE_RCM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTSCM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSETCM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION_START_BCM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_BCM_BLNDGAM_RAMA_EXP_REGION_START_GCM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_GCM_BLNDGAM_RAMA_EXP_REGION_START_RCM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_RCM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_BCM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_GCM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_RCM_BLNDGAM_RAMA_EXP_REGION_END_BCM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_BCM_BLNDGAM_RAMA_EXP_REGION_END_BASE_BCM_BLNDGAM_RAMA_EXP_REGION_END_GCM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_GCM_BLNDGAM_RAMA_EXP_REGION_END_BASE_GCM_BLNDGAM_RAMA_EXP_REGION_END_RCM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_RCM_BLNDGAM_RAMA_EXP_REGION_END_BASE_RCM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTSCM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSETCM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTSCM_BLNDGAM_LUT_WRITE_EN_MASKCM_BLNDGAM_LUT_WRITE_SELCM_BLNDGAM_CONFIG_STATUSCM_BLNDGAM_LUT_INDEXBLNDGAM_MEM_PWR_FORCECM_3DLUT_MODECM_3DLUT_SIZECM_3DLUT_INDEXCM_3DLUT_DATA0CM_3DLUT_DATA1CM_3DLUT_DATA_30BITCM_3DLUT_WRITE_EN_MASKCM_3DLUT_RAM_SELCM_3DLUT_30BIT_ENCM_3DLUT_CONFIG_STATUSCM_3DLUT_READ_SELCM_SHAPER_LUT_MODECM_SHAPER_RAMB_EXP_REGION_START_BCM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_BCM_SHAPER_RAMB_EXP_REGION_START_GCM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_GCM_SHAPER_RAMB_EXP_REGION_START_RCM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_RCM_SHAPER_RAMB_EXP_REGION_END_BCM_SHAPER_RAMB_EXP_REGION_END_BASE_BCM_SHAPER_RAMB_EXP_REGION_END_GCM_SHAPER_RAMB_EXP_REGION_END_BASE_GCM_SHAPER_RAMB_EXP_REGION_END_RCM_SHAPER_RAMB_EXP_REGION_END_BASE_RCM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTSCM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSETCM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION_START_BCM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_BCM_SHAPER_RAMA_EXP_REGION_START_GCM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_GCM_SHAPER_RAMA_EXP_REGION_START_RCM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_RCM_SHAPER_RAMA_EXP_REGION_END_BCM_SHAPER_RAMA_EXP_REGION_END_BASE_BCM_SHAPER_RAMA_EXP_REGION_END_GCM_SHAPER_RAMA_EXP_REGION_END_BASE_GCM_SHAPER_RAMA_EXP_REGION_END_RCM_SHAPER_RAMA_EXP_REGION_END_BASE_RCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTSCM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSETCM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTSCM_SHAPER_LUT_WRITE_EN_MASKCM_SHAPER_CONFIG_STATUSCM_SHAPER_LUT_WRITE_SELCM_SHAPER_LUT_INDEXCM_SHAPER_LUT_DATACM_DGAM_CONFIG_STATUSCM_ICSC_MODECM_ICSC_C11CM_ICSC_C12CM_ICSC_C33CM_ICSC_C34CM_BNS_BIAS_RCM_BNS_BIAS_GCM_BNS_BIAS_BCM_BNS_SCALE_RCM_BNS_SCALE_GCM_BNS_SCALE_BCM_DGAM_RAMB_EXP_REGION_START_BCM_DGAM_RAMB_EXP_REGION_START_SEGMENT_BCM_DGAM_RAMB_EXP_REGION_START_GCM_DGAM_RAMB_EXP_REGION_START_SEGMENT_GCM_DGAM_RAMB_EXP_REGION_START_RCM_DGAM_RAMB_EXP_REGION_START_SEGMENT_RCM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_BCM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_GCM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_RCM_DGAM_RAMB_EXP_REGION_END_BCM_DGAM_RAMB_EXP_REGION_END_SLOPE_BCM_DGAM_RAMB_EXP_REGION_END_BASE_BCM_DGAM_RAMB_EXP_REGION_END_GCM_DGAM_RAMB_EXP_REGION_END_SLOPE_GCM_DGAM_RAMB_EXP_REGION_END_BASE_GCM_DGAM_RAMB_EXP_REGION_END_RCM_DGAM_RAMB_EXP_REGION_END_SLOPE_RCM_DGAM_RAMB_EXP_REGION_END_BASE_RCM_DGAM_RAMB_EXP_REGION0_LUT_OFFSETCM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTSCM_DGAM_RAMB_EXP_REGION1_LUT_OFFSETCM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTSCM_DGAM_RAMB_EXP_REGION14_LUT_OFFSETCM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTSCM_DGAM_RAMB_EXP_REGION15_LUT_OFFSETCM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTSCM_DGAM_RAMA_EXP_REGION_START_BCM_DGAM_RAMA_EXP_REGION_START_SEGMENT_BCM_DGAM_RAMA_EXP_REGION_START_GCM_DGAM_RAMA_EXP_REGION_START_SEGMENT_GCM_DGAM_RAMA_EXP_REGION_START_RCM_DGAM_RAMA_EXP_REGION_START_SEGMENT_RCM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_BCM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_GCM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_RCM_DGAM_RAMA_EXP_REGION_END_BCM_DGAM_RAMA_EXP_REGION_END_SLOPE_BCM_DGAM_RAMA_EXP_REGION_END_BASE_BCM_DGAM_RAMA_EXP_REGION_END_GCM_DGAM_RAMA_EXP_REGION_END_SLOPE_GCM_DGAM_RAMA_EXP_REGION_END_BASE_GCM_DGAM_RAMA_EXP_REGION_END_RCM_DGAM_RAMA_EXP_REGION_END_SLOPE_RCM_DGAM_RAMA_EXP_REGION_END_BASE_RCM_DGAM_RAMA_EXP_REGION0_LUT_OFFSETCM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTSCM_DGAM_RAMA_EXP_REGION1_LUT_OFFSETCM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTSCM_DGAM_RAMA_EXP_REGION14_LUT_OFFSETCM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTSCM_DGAM_RAMA_EXP_REGION15_LUT_OFFSETCM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTSSHARED_MEM_PWR_DISCM_IGAM_LUT_FORMAT_RCM_IGAM_LUT_FORMAT_GCM_IGAM_LUT_FORMAT_BCM_IGAM_LUT_HOST_ENCM_IGAM_LUT_RW_MODECM_IGAM_LUT_WRITE_EN_MASKCM_IGAM_LUT_SELCM_IGAM_LUT_SEQ_COLORCM_IGAM_DGAM_CONFIG_STATUSCM_DGAM_LUT_WRITE_EN_MASKCM_DGAM_LUT_WRITE_SELCM_DGAM_LUT_INDEXCM_DGAM_LUT_DATACM_DGAM_LUT_MODECM_IGAM_LUT_MODECM_IGAM_INPUT_FORMATCM_IGAM_LUT_RW_INDEXCM_BYPASS_ENCM_BYPASSCM_TEST_DEBUG_INDEXCM_TEST_DEBUG_DATA_ID9_ICSC_MODECM_TEST_DEBUG_DATA_ID9_OCSC_MODEFORMAT_CONTROL__ALPHA_ENDPPCLK_RATE_CONTROLCM_HDR_MULT_COEFCUR0_FP_BIASCUR0_FP_SCALECM_BLNDGAM_LUT_DATACM_TEST_DEBUG_DATA_ICSC_MODECM_TEST_DEBUG_DATA_GAMUT_REMAP_MODEFORMAT_CNV16CNVC_BYPASS_MSB_ALIGNCLAMP_POSITIVECLAMP_POSITIVE_CALPHA_2BIT_LUT0ALPHA_2BIT_LUT1ALPHA_2BIT_LUT2ALPHA_2BIT_LUT3FCNV_FP_BIAS_RFCNV_FP_BIAS_GFCNV_FP_BIAS_BFCNV_FP_SCALE_RFCNV_FP_SCALE_GFCNV_FP_SCALE_BCOLOR_KEYER_ENCOLOR_KEYER_MODECOLOR_KEYER_ALPHA_LOWCOLOR_KEYER_ALPHA_HIGHCOLOR_KEYER_RED_LOWCOLOR_KEYER_RED_HIGHCOLOR_KEYER_GREEN_LOWCOLOR_KEYER_GREEN_HIGHCOLOR_KEYER_BLUE_LOWCOLOR_KEYER_BLUE_HIGHCUR0_PIX_INV_MODECUR0_PIXEL_ALPHA_MOD_ENCUR0_ROM_ENOBUF_MEM_PWR_FORCEdcn201_dpp_maskdcn201_dpp_registersDSCL_EXT_OVERSCAN_LEFT_RIGHTDSCL_EXT_OVERSCAN_TOP_BOTTOMOTG_H_BLANKOTG_V_BLANKDSCL_MEM_PWR_CTRLDSCL_MEM_PWR_STATUSDSCL_AUTOCALDSCL_CONTROLSCL_BLACK_OFFSETSCL_COEF_RAM_TAP_SELECTDSCL_2TAP_CONTROLMPC_SIZESCL_HORZ_FILTER_SCALE_RATIO_CSCL_VERT_FILTER_SCALE_RATIO_CSCL_HORZ_FILTER_INIT_CSCL_VERT_FILTER_INIT_BOTSCL_VERT_FILTER_INIT_CSCL_VERT_FILTER_INIT_BOT_CRECOUT_STARTRECOUT_SIZECM_GAMUT_REMAP_CONTROLCM_GAMUT_REMAP_C11_C12CM_GAMUT_REMAP_C13_C14CM_GAMUT_REMAP_C21_C22CM_GAMUT_REMAP_C23_C24CM_GAMUT_REMAP_C31_C32CM_GAMUT_REMAP_C33_C34CM_COMA_C11_C12CM_COMA_C33_C34CM_COMB_C11_C12CM_COMB_C33_C34CM_OCSC_CONTROLCM_OCSC_C11_C12CM_OCSC_C33_C34CM_MEM_PWR_CTRLCM_RGAM_RAMB_START_CNTL_BCM_RGAM_RAMB_START_CNTL_GCM_RGAM_RAMB_START_CNTL_RCM_RGAM_RAMB_SLOPE_CNTL_BCM_RGAM_RAMB_SLOPE_CNTL_GCM_RGAM_RAMB_SLOPE_CNTL_RCM_RGAM_RAMB_END_CNTL1_BCM_RGAM_RAMB_END_CNTL2_BCM_RGAM_RAMB_END_CNTL1_GCM_RGAM_RAMB_END_CNTL2_GCM_RGAM_RAMB_END_CNTL1_RCM_RGAM_RAMB_END_CNTL2_RCM_RGAM_RAMB_REGION_0_1CM_RGAM_RAMB_REGION_32_33CM_RGAM_RAMA_START_CNTL_BCM_RGAM_RAMA_START_CNTL_GCM_RGAM_RAMA_START_CNTL_RCM_RGAM_RAMA_SLOPE_CNTL_BCM_RGAM_RAMA_SLOPE_CNTL_GCM_RGAM_RAMA_SLOPE_CNTL_RCM_RGAM_RAMA_END_CNTL1_BCM_RGAM_RAMA_END_CNTL2_BCM_RGAM_RAMA_END_CNTL1_GCM_RGAM_RAMA_END_CNTL2_GCM_RGAM_RAMA_END_CNTL1_RCM_RGAM_RAMA_END_CNTL2_RCM_RGAM_RAMA_REGION_0_1CM_RGAM_RAMA_REGION_32_33CM_RGAM_CONTROLCM_CMOUT_CONTROLCM_BLNDGAM_CONTROLCM_BLNDGAM_RAMB_START_CNTL_BCM_BLNDGAM_RAMB_START_CNTL_GCM_BLNDGAM_RAMB_START_CNTL_RCM_BLNDGAM_RAMB_SLOPE_CNTL_BCM_BLNDGAM_RAMB_SLOPE_CNTL_GCM_BLNDGAM_RAMB_SLOPE_CNTL_RCM_BLNDGAM_RAMB_END_CNTL1_BCM_BLNDGAM_RAMB_END_CNTL2_BCM_BLNDGAM_RAMB_END_CNTL1_GCM_BLNDGAM_RAMB_END_CNTL2_GCM_BLN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CL_LB_MEM_PWR_STATEDWB_OGAM_LUT_MEM_PWR_FORCEDWB_OGAM_LUT_MEM_PWR_DISDWB_OGAM_LUT_MEM_PWR_STATEFC_FRAME_CAPTURE_ENFC_FRAME_CAPTURE_RATEFC_WINDOW_CROP_ENFC_EYE_SELECTIONFC_STEREO_EYE_POLARITYFC_NEW_CONTENTFC_FI_ENFC_FI_PHASEFC_FRAME_CAPTURE_EN_CURRENTFC_FIRST_PIXEL_DELAY_COUNTFC_WINDOW_START_XFC_WINDOW_START_YFC_WINDOW_WIDTHFC_WINDOW_HEIGHTFC_SOURCE_WIDTHFC_SOURCE_HEIGHTDWB_UPDATE_LOCKDWB_UPDATE_PENDINGDWB_CRC_ENDWB_CRC_CONT_ENDWB_CRC_SRC_SELDWB_CRC_RED_MASKDWB_CRC_GREEN_MASKDWB_CRC_BLUE_MASKDWB_CRC_A_MASKDWB_CRC_SIG_REDDWB_CRC_SIG_GREENDWB_CRC_SIG_BLUEDWB_CRC_SIG_AOUT_FORMATOUT_DENORMOUT_MAXOUT_MINDWB_MMHUBBUB_MAX_BACKPRESSUREDWB_HOST_READ_RATE_CONTROLDWBSCL_DATA_OVERFLOW_FLAGDWBSCL_DATA_OVERFLOW_ACKDWBSCL_DATA_OVERFLOW_MASKDWBSCL_DATA_OVERFLOW_INT_STATUSDWBSCL_DATA_OVERFLOW_INT_TYPEDWBSCL_DATA_OVERFLOW_TYPEDWBSCL_DATA_OVERFLOW_OUT_X_CNTDWBSCL_DATA_OVERFLOW_OUT_Y_CNTDWBSCL_COEF_RAM_TAP_PAIR_IDXDWBSCL_COEF_RAM_PHASEDWBSCL_COEF_RAM_FILTER_TYPEDWBSCL_COEF_RAM_SELECT_RDDWBSCL_COEF_RAM_EVEN_TAP_COEFDWBSCL_COEF_RAM_EVEN_TAP_COEF_ENDWBSCL_COEF_RAM_ODD_TAP_COEFDWBSCL_COEF_RAM_ODD_TAP_COEF_ENDWBSCL_COEF_RAM_SELECTDWBSCL_COEF_RAM_SELECT_CURRENTDWBSCL_H_NUM_OF_TAPSDWBSCL_V_NUM_OF_TAPSDWBSCL_H_SCALE_RATIODWBSCL_H_INIT_FRACDWBSCL_H_INIT_INTDWBSCL_V_SCALE_RATIODWBSCL_V_INIT_FRACDWBSCL_V_INIT_INTDWBSCL_BOUNDARY_MODEDWBSCL_BLACK_COLOR_RGBDWBSCL_DEST_WIDTHDWBSCL_DEST_HEIGHTDWB_GAMUT_REMAP_MODE_CURRENTDWB_GAMUT_REMAPA_C11DWB_GAMUT_REMAPA_C12DWB_GAMUT_REMAPA_C13DWB_GAMUT_REMAPA_C14DWB_GAMUT_REMAPA_C21DWB_GAMUT_REMAPA_C22DWB_GAMUT_REMAPA_C23DWB_GAMUT_REMAPA_C24DWB_GAMUT_REMAPA_C31DWB_GAMUT_REMAPA_C32DWB_GAMUT_REMAPA_C33DWB_GAMUT_REMAPA_C34DWB_GAMUT_REMAPB_C11DWB_GAMUT_REMAPB_C12DWB_GAMUT_REMAPB_C13DWB_GAMUT_REMAPB_C14DWB_GAMUT_REMAPB_C21DWB_GAMUT_REMAPB_C22DWB_GAMUT_REMAPB_C23DWB_GAMUT_REMAPB_C24DWB_GAMUT_REMAPB_C31DWB_GAMUT_REMAPB_C32DWB_GAMUT_REMAPB_C33DWB_GAMUT_REMAPB_C34DWB_OGAM_MODEDWB_OGAM_SELECTDWB_OGAM_PWL_DISABLEDWB_OGAM_MODE_CURRENTDWB_OGAM_SELECT_CURRENTDWB_OGAM_LUT_WRITE_COLOR_MASKDWB_OGAM_LUT_READ_COLOR_SELDWB_OGAM_LUT_HOST_SELDWB_OGAM_LUT_CONFIG_MODEDWB_OGAM_LUT_STATUSDWB_OGAM_RAMA_EXP_REGION_START_BDWB_OGAM_RAMA_EXP_REGION_START_SEGMENT_BDWB_OGAM_RAMA_EXP_REGION_START_GDWB_OGAM_RAMA_EXP_REGION_START_SEGMENT_GDWB_OGAM_RAMA_EXP_REGION_START_RDWB_OGAM_RAMA_EXP_REGION_START_SEGMENT_RDWB_OGAM_RAMA_EXP_REGION_START_BASE_BDWB_OGAM_RAMA_EXP_REGION_START_SLOPE_BDWB_OGAM_RAMA_EXP_REGION_START_BASE_GDWB_OGAM_RAMA_EXP_REGION_START_SLOPE_GDWB_OGAM_RAMA_EXP_REGION_START_BASE_RDWB_OGAM_RAMA_EXP_REGION_START_SLOPE_RDWB_OGAM_RAMA_EXP_REGION_END_BASE_BDWB_OGAM_RAMA_EXP_REGION_END_BDWB_OGAM_RAMA_EXP_REGION_END_SLOPE_BDWB_OGAM_RAMA_EXP_REGION_END_BASE_GDWB_OGAM_RAMA_EXP_REGION_END_GDWB_OGAM_RAMA_EXP_REGION_END_SLOPE_GDWB_OGAM_RAMA_EXP_REGION_END_BASE_RDWB_OGAM_RAMA_EXP_REGION_END_RDWB_OGAM_RAMA_EXP_REGION_END_SLOPE_RDWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION2_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION2_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION3_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION3_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION4_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION4_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION5_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION5_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION6_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION6_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION7_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION7_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION8_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION8_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION9_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION9_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION10_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION10_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION11_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION11_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION12_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION12_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION13_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION13_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION14_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION14_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION15_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION15_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION16_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION16_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION17_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION17_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION18_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION18_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION19_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION19_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION20_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION20_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION21_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION21_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION22_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION22_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION23_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION23_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION24_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION24_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION25_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION25_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION26_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION26_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION27_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION27_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION28_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION28_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION29_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION29_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION30_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION30_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION31_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION31_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION32_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION32_NUM_SEGMENTSDWB_OGAM_RAMA_EXP_REGION33_LUT_OFFSETDWB_OGAM_RAMA_EXP_REGION33_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION_START_BDWB_OGAM_RAMB_EXP_REGION_START_SEGMENT_BDWB_OGAM_RAMB_EXP_REGION_START_GDWB_OGAM_RAMB_EXP_REGION_START_SEGMENT_GDWB_OGAM_RAMB_EXP_REGION_START_RDWB_OGAM_RAMB_EXP_REGION_START_SEGMENT_RDWB_OGAM_RAMB_EXP_REGION_START_BASE_BDWB_OGAM_RAMB_EXP_REGION_START_SLOPE_BDWB_OGAM_RAMB_EXP_REGION_START_BASE_GDWB_OGAM_RAMB_EXP_REGION_START_SLOPE_GDWB_OGAM_RAMB_EXP_REGION_START_BASE_RDWB_OGAM_RAMB_EXP_REGION_START_SLOPE_RDWB_OGAM_RAMB_EXP_REGION_END_BASE_BDWB_OGAM_RAMB_EXP_REGION_END_BDWB_OGAM_RAMB_EXP_REGION_END_SLOPE_BDWB_OGAM_RAMB_EXP_REGION_END_BASE_GDWB_OGAM_RAMB_EXP_REGION_END_GDWB_OGAM_RAMB_EXP_REGION_END_SLOPE_GDWB_OGAM_RAMB_EXP_REGION_END_BASE_RDWB_OGAM_RAMB_EXP_REGION_END_RDWB_OGAM_RAMB_EXP_REGION_END_SLOPE_RDWB_OGAM_RAMB_EXP_REGION0_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION0_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION1_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION1_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION2_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION2_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION3_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION3_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION4_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION4_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION5_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION5_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION6_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION6_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION7_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION7_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION8_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION8_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION9_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION9_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION10_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION10_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION11_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION11_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION12_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION12_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION13_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION13_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION14_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION14_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION15_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION15_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION16_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION16_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION17_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION17_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION18_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION18_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION19_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION19_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION20_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION20_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION21_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION21_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION22_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION22_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION23_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION23_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION24_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION24_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION25_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION25_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION26_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION26_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION27_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION27_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION28_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION28_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION29_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION29_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION30_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION30_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION31_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION31_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION32_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION32_NUM_SEGMENTSDWB_OGAM_RAMB_EXP_REGION33_LUT_OFFSETDWB_OGAM_RAMB_EXP_REGION33_NUM_SEGMENTSdcn30_dwbc_shiftdcn30_dwbcdwbc_regsdwbc_shiftdwbc_maskdcn_hubp2_registersFLIP_PARAMETERS_3FLIP_PARAMETERS_4FLIP_PARAMETERS_5FLIP_PARAMETERS_6VBLANK_PARAMETERS_5VBLANK_PARAMETERS_6DCN_DMDATA_VM_CNTLDCHUBP_MALL_CONFIGDCHUBP_VMPG_CONFIGUCLK_PSTATE_FORCEdcn_hubp2_shiftREFCYC_PER_VM_GROUP_FLIPREFCYC_PER_VM_REQ_FLIPREFCYC_PER_VM_GROUP_VBLANKREFCYC_PER_VM_REQ_VBLANKREFCYC_PER_PTE_GROUP_FLIP_CREFCYC_PER_META_CHUNK_FLIP_CVM_GROUP_SIZEPRIMARY_SURFACE_DCC_IND_BLKSECONDARY_SURFACE_DCC_IND_BLKPRIMARY_SURFACE_DCC_IND_BLK_CSECONDARY_SURFACE_DCC_IND_BLK_CREFCYC_PER_VM_DMDATADMDATA_VM_FAULT_STATUSDMDATA_VM_FAULT_STATUS_CLEARDMDATA_VM_UNDERFLOW_STATUSDMDATA_VM_LATE_STATUSDMDATA_VM_UNDERFLOW_STATUS_CLEARDMDATA_VM_DONECROSSBAR_SRC_Y_GCROSSBAR_SRC_ALPHAPACK_3TO2_ELEMENT_DISABLEROW_TTU_MODENUM_PKRSHUBP_UNBOUNDED_REQ_MODECURSOR_REQ_MODEHUBP_SOFT_RESETUSE_MALL_SELUSE_MALL_FOR_CURSORVMPG_SIZEDATA_UCLK_PSTATE_FORCE_ENDATA_UCLK_PSTATE_FORCE_VALUECURSOR_UCLK_PSTATE_FORCE_ENCURSOR_UCLK_PSTATE_FORCE_VALUEdcn_hubp2_maskdcn20_hubpdcn30_mmhubbub_registersMCIF_WB_BUFMGR_SW_CONTROLMCIF_WB_BUFMGR_CUR_LINE_RMCIF_WB_BUFMGR_STATUSMCIF_WB_BUF_PITCHMCIF_WB_BUF_1_STATUSMCIF_WB_BUF_1_STATUS2MCIF_WB_BUF_2_STATUSMCIF_WB_BUF_2_STATUS2MCIF_WB_BUF_3_STATUSMCIF_WB_BUF_3_STATUS2MCIF_WB_BUF_4_STATUSMCIF_WB_BUF_4_ST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HAPER_RAMA_START_CNTL_BSHAPER_RAMA_START_CNTL_GSHAPER_RAMA_START_CNTL_RSHAPER_RAMA_END_CNTL_BSHAPER_RAMA_END_CNTL_GSHAPER_RAMA_END_CNTL_RSHAPER_RAMA_REGION_0_1SHAPER_RAMA_REGION_2_3SHAPER_RAMA_REGION_4_5SHAPER_RAMA_REGION_6_7SHAPER_RAMA_REGION_8_9SHAPER_RAMA_REGION_10_11SHAPER_RAMA_REGION_12_13SHAPER_RAMA_REGION_14_15SHAPER_RAMA_REGION_16_17SHAPER_RAMA_REGION_18_19SHAPER_RAMA_REGION_20_21SHAPER_RAMA_REGION_22_23SHAPER_RAMA_REGION_24_25SHAPER_RAMA_REGION_26_27SHAPER_RAMA_REGION_28_29SHAPER_RAMA_REGION_30_31SHAPER_RAMA_REGION_32_33MPCC_OGAM_RAMA_START_SLOPE_CNTL_BMPCC_OGAM_RAMA_START_SLOPE_CNTL_GMPCC_OGAM_RAMA_START_SLOPE_CNTL_RMPCC_OGAM_RAMA_OFFSET_BMPCC_OGAM_RAMA_OFFSET_GMPCC_OGAM_RAMA_OFFSET_RMPCC_OGAM_RAMA_START_BASE_CNTL_BMPCC_OGAM_RAMA_START_BASE_CNTL_GMPCC_OGAM_RAMA_START_BASE_CNTL_RSHAPER_RAMB_START_CNTL_BSHAPER_RAMB_START_CNTL_GSHAPER_RAMB_START_CNTL_RSHAPER_RAMB_END_CNTL_BSHAPER_RAMB_END_CNTL_GSHAPER_RAMB_END_CNTL_RSHAPER_RAMB_REGION_0_1SHAPER_RAMB_REGION_2_3SHAPER_RAMB_REGION_4_5SHAPER_RAMB_REGION_6_7SHAPER_RAMB_REGION_8_9SHAPER_RAMB_REGION_10_11SHAPER_RAMB_REGION_12_13SHAPER_RAMB_REGION_14_15SHAPER_RAMB_REGION_16_17SHAPER_RAMB_REGION_18_19SHAPER_RAMB_REGION_20_21SHAPER_RAMB_REGION_22_23SHAPER_RAMB_REGION_24_25SHAPER_RAMB_REGION_26_27SHAPER_RAMB_REGION_28_29SHAPER_RAMB_REGION_30_31SHAPER_RAMB_REGION_32_33RMU_3DLUT_MODERMU_3DLUT_INDEXRMU_3DLUT_DATARMU_3DLUT_DATA_30BITRMU_3DLUT_READ_WRITE_CONTROLRMU_3DLUT_OUT_NORM_FACTORRMU_3DLUT_OUT_OFFSET_RRMU_3DLUT_OUT_OFFSET_GRMU_3DLUT_OUT_OFFSET_BMPCC_OGAM_RAMB_START_SLOPE_CNTL_BMPCC_OGAM_RAMB_START_SLOPE_CNTL_GMPCC_OGAM_RAMB_START_SLOPE_CNTL_RMPCC_OGAM_CONTROLMPCC_OGAM_LUT_CONTROLMPCC_OGAM_RAMB_OFFSET_BMPCC_OGAM_RAMB_OFFSET_GMPCC_OGAM_RAMB_OFFSET_RMPCC_OGAM_RAMB_START_BASE_CNTL_BMPCC_OGAM_RAMB_START_BASE_CNTL_GMPCC_OGAM_RAMB_START_BASE_CNTL_RMPC_OUT_CSC_COEF_FORMATMPCC_MOVABLE_CM_LOCATION_CONTROLMPCC_MCM_SHAPER_CONTROLMPCC_MCM_SHAPER_OFFSET_RMPCC_MCM_SHAPER_OFFSET_GMPCC_MCM_SHAPER_OFFSET_BMPCC_MCM_SHAPER_SCALE_RMPCC_MCM_SHAPER_SCALE_G_BMPCC_MCM_SHAPER_LUT_INDEXMPCC_MCM_SHAPER_LUT_DATAMPCC_MCM_SHAPER_LUT_WRITE_EN_MASKMPCC_MCM_SHAPER_RAMA_START_CNTL_BMPCC_MCM_SHAPER_RAMA_START_CNTL_GMPCC_MCM_SHAPER_RAMA_START_CNTL_RMPCC_MCM_SHAPER_RAMA_END_CNTL_BMPCC_MCM_SHAPER_RAMA_END_CNTL_GMPCC_MCM_SHAPER_RAMA_END_CNTL_RMPCC_MCM_SHAPER_RAMA_REGION_0_1MPCC_MCM_SHAPER_RAMA_REGION_2_3MPCC_MCM_SHAPER_RAMA_REGION_4_5MPCC_MCM_SHAPER_RAMA_REGION_6_7MPCC_MCM_SHAPER_RAMA_REGION_8_9MPCC_MCM_SHAPER_RAMA_REGION_10_11MPCC_MCM_SHAPER_RAMA_REGION_12_13MPCC_MCM_SHAPER_RAMA_REGION_14_15MPCC_MCM_SHAPER_RAMA_REGION_16_17MPCC_MCM_SHAPER_RAMA_REGION_18_19MPCC_MCM_SHAPER_RAMA_REGION_20_21MPCC_MCM_SHAPER_RAMA_REGION_22_23MPCC_MCM_SHAPER_RAMA_REGION_24_25MPCC_MCM_SHAPER_RAMA_REGION_26_27MPCC_MCM_SHAPER_RAMA_REGION_28_29MPCC_MCM_SHAPER_RAMA_REGION_30_31MPCC_MCM_SHAPER_RAMA_REGION_32_33MPCC_MCM_SHAPER_RAMB_START_CNTL_BMPCC_MCM_SHAPER_RAMB_START_CNTL_GMPCC_MCM_SHAPER_RAMB_START_CNTL_RMPCC_MCM_SHAPER_RAMB_END_CNTL_BMPCC_MCM_SHAPER_RAMB_END_CNTL_GMPCC_MCM_SHAPER_RAMB_END_CNTL_RMPCC_MCM_SHAPER_RAMB_REGION_0_1MPCC_MCM_SHAPER_RAMB_REGION_2_3MPCC_MCM_SHAPER_RAMB_REGION_4_5MPCC_MCM_SHAPER_RAMB_REGION_6_7MPCC_MCM_SHAPER_RAMB_REGION_8_9MPCC_MCM_SHAPER_RAMB_REGION_10_11MPCC_MCM_SHAPER_RAMB_REGION_12_13MPCC_MCM_SHAPER_RAMB_REGION_14_15MPCC_MCM_SHAPER_RAMB_REGION_16_17MPCC_MCM_SHAPER_RAMB_REGION_18_19MPCC_MCM_SHAPER_RAMB_REGION_20_21MPCC_MCM_SHAPER_RAMB_REGION_22_23MPCC_MCM_SHAPER_RAMB_REGION_24_25MPCC_MCM_SHAPER_RAMB_REGION_26_27MPCC_MCM_SHAPER_RAMB_REGION_28_29MPCC_MCM_SHAPER_RAMB_REGION_30_31MPCC_MCM_SHAPER_RAMB_REGION_32_33MPCC_MCM_3DLUT_MODEMPCC_MCM_3DLUT_INDEXMPCC_MCM_3DLUT_DATAMPCC_MCM_3DLUT_DATA_30BITMPCC_MCM_3DLUT_READ_WRITE_CONTROLMPCC_MCM_3DLUT_OUT_NORM_FACTORMPCC_MCM_3DLUT_OUT_OFFSET_RMPCC_MCM_3DLUT_OUT_OFFSET_GMPCC_MCM_3DLUT_OUT_OFFSET_BMPCC_MCM_1DLUT_CONTROLMPCC_MCM_1DLUT_LUT_INDEXMPCC_MCM_1DLUT_LUT_DATAMPCC_MCM_1DLUT_LUT_CONTROLMPCC_MCM_1DLUT_RAMA_START_CNTL_BMPCC_MCM_1DLUT_RAMA_START_CNTL_GMPCC_MCM_1DLUT_RAMA_START_CNTL_RMPCC_MCM_1DLUT_RAMA_START_SLOPE_CNTL_BMPCC_MCM_1DLUT_RAMA_START_SLOPE_CNTL_GMPCC_MCM_1DLUT_RAMA_START_SLOPE_CNTL_RMPCC_MCM_1DLUT_RAMA_START_BASE_CNTL_BMPCC_MCM_1DLUT_RAMA_START_BASE_CNTL_GMPCC_MCM_1DLUT_RAMA_START_BASE_CNTL_RMPCC_MCM_1DLUT_RAMA_END_CNTL1_BMPCC_MCM_1DLUT_RAMA_END_CNTL2_BMPCC_MCM_1DLUT_RAMA_END_CNTL1_GMPCC_MCM_1DLUT_RAMA_END_CNTL2_GMPCC_MCM_1DLUT_RAMA_END_CNTL1_RMPCC_MCM_1DLUT_RAMA_END_CNTL2_RMPCC_MCM_1DLUT_RAMA_OFFSET_BMPCC_MCM_1DLUT_RAMA_OFFSET_GMPCC_MCM_1DLUT_RAMA_OFFSET_RMPCC_MCM_1DLUT_RAMA_REGION_0_1MPCC_MCM_1DLUT_RAMA_REGION_2_3MPCC_MCM_1DLUT_RAMA_REGION_4_5MPCC_MCM_1DLUT_RAMA_REGION_6_7MPCC_MCM_1DLUT_RAMA_REGION_8_9MPCC_MCM_1DLUT_RAMA_REGION_10_11MPCC_MCM_1DLUT_RAMA_REGION_12_13MPCC_MCM_1DLUT_RAMA_REGION_14_15MPCC_MCM_1DLUT_RAMA_REGION_16_17MPCC_MCM_1DLUT_RAMA_REGION_18_19MPCC_MCM_1DLUT_RAMA_REGION_20_21MPCC_MCM_1DLUT_RAMA_REGION_22_23MPCC_MCM_1DLUT_RAMA_REGION_24_25MPCC_MCM_1DLUT_RAMA_REGION_26_27MPCC_MCM_1DLUT_RAMA_REGION_28_29MPCC_MCM_1DLUT_RAMA_REGION_30_31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T_FE_IDBIN_CONF_OVERRIDE_CHECKTHREAD_TRACE_DRAWDRAW_DONECP_PIPE_IDPIPE_ID0PIPE_ID1PIPE_ID2PIPE_ID3v11_gfx_mqdshadow_base_loshadow_base_higds_bkup_base_logds_bkup_base_hifw_work_area_base_lofw_work_area_base_hishadow_initializedreserved_8reserved_9reserved_10reserved_11reserved_12reserved_13reserved_14reserved_15reserved_16reserved_17reserved_18reserved_19reserved_20reserved_21checksum_lochecksum_hicp_mqd_query_wave_countcp_mqd_query_gfx_hqd_rptrcp_mqd_query_gfx_hqd_wptrcp_mqd_query_gfx_hqd_offsetcontrol_buf_addr_locontrol_buf_addr_hicp_mqd_base_addrcp_gfx_hqd_activecp_gfx_hqd_vmidreserved_131reserved_132cp_gfx_hqd_queue_prioritycp_gfx_hqd_quantumcp_gfx_hqd_basecp_gfx_hqd_base_hicp_gfx_hqd_rptrcp_gfx_hqd_rptr_addrcp_gfx_hqd_rptr_addr_hicp_rb_wptr_poll_addr_locp_rb_wptr_poll_addr_hicp_rb_doorbell_controlcp_gfx_hqd_offsetcp_gfx_hqd_cntlreserved_146reserved_147cp_gfx_hqd_csmd_rptrcp_gfx_hqd_wptrcp_gfx_hqd_wptr_hireserved_151reserved_152reserved_153reserved_154reserved_155cp_gfx_hqd_mappedcp_gfx_hqd_que_mgr_controlreserved_158reserved_159cp_gfx_hqd_hq_status0cp_gfx_hqd_hq_control0cp_gfx_mqd_controlreserved_163reserved_164reserved_165reserved_166reserved_167reserved_168reserved_169cp_num_prim_needed_count0_locp_num_prim_needed_count0_hicp_num_prim_needed_count1_locp_num_prim_needed_count1_hicp_num_prim_needed_count2_locp_num_prim_needed_count2_hicp_num_prim_needed_count3_locp_num_prim_needed_count3_hicp_num_prim_written_count0_locp_num_prim_written_count0_hicp_num_prim_written_count1_locp_num_prim_written_count1_hicp_num_prim_written_count2_locp_num_prim_written_count2_hicp_num_prim_written_count3_locp_num_prim_written_count3_himp1_smn_fps_cntsq_thread_trace_buf0_basesq_thread_trace_buf0_sizesq_thread_trace_buf1_basesq_thread_trace_buf1_sizesq_thread_trace_wptrsq_thread_trace_masksq_thread_trace_token_masksq_thread_trace_ctrlsq_thread_trace_statussq_thread_trace_dropped_cntrsq_thread_trace_finish_done_debugsq_thread_trace_gfx_draw_cntrsq_thread_trace_gfx_marker_cntrsq_thread_trace_hp3d_draw_cntrsq_thread_trace_hp3d_marker_cntrreserved_206reserved_207cp_sc_psinvoc_count0_locp_sc_psinvoc_count0_hicp_pa_cprim_count_locp_pa_cprim_count_hicp_pa_cinvoc_count_locp_pa_cinvoc_count_hicp_vgt_vsinvoc_count_locp_vgt_vsinvoc_count_hicp_vgt_gsinvoc_count_locp_vgt_gsinvoc_count_hicp_vgt_gsprim_count_locp_vgt_gsprim_count_hicp_vgt_iaprim_count_locp_vgt_iaprim_count_hicp_vgt_iavert_count_locp_vgt_iavert_count_hicp_vgt_hsinvoc_count_locp_vgt_hsinvoc_count_hicp_vgt_dsinvoc_count_locp_vgt_dsinvoc_count_hicp_vgt_csinvoc_count_locp_vgt_csinvoc_count_hireserved_230reserved_231reserved_232reserved_233reserved_234reserved_235reserved_240reserved_241reserved_242reserved_243reserved_244reserved_245reserved_246reserved_247reserved_248reserved_249reserved_250reserved_251reserved_252reserved_253reserved_254reserved_255vgt_strmout_buffer_filled_size_0vgt_strmout_buffer_filled_size_1vgt_strmout_buffer_filled_size_2vgt_strmout_buffer_filled_size_3vgt_dma_max_sizevgt_dma_num_instancesit_set_base_ib_addr_loit_set_base_ib_addr_hispi_shader_pgm_rsrc3_psspi_shader_pgm_rsrc3_vsspi_shader_pgm_rsrc3_gsspi_shader_pgm_rsrc3_hsspi_shader_pgm_rsrc4_psspi_shader_pgm_rsrc4_vsspi_shader_pgm_rsrc4_gsspi_shader_pgm_rsrc4_hsdb_occlusion_count0_low_00db_occlusion_count0_hi_00db_occlusion_count1_low_00db_occlusion_count1_hi_00db_occlusion_count2_low_00db_occlusion_count2_hi_00db_occlusion_count3_low_00db_occlusion_count3_hi_00db_occlusion_count0_low_01db_occlusion_count0_hi_01db_occlusion_count1_low_01db_occlusion_count1_hi_01db_occlusion_count2_low_01db_occlusion_count2_hi_01db_occlusion_count3_low_01db_occlusion_count3_hi_01db_occlusion_count0_low_02db_occlusion_count0_hi_02db_occlusion_count1_low_02db_occlusion_count1_hi_02db_occlusion_count2_low_02db_occlusion_count2_hi_02db_occlusion_count3_low_02db_occlusion_count3_hi_02db_occlusion_count0_low_03db_occlusion_count0_hi_03db_occlusion_count1_low_03db_occlusion_count1_hi_03db_occlusion_count2_low_03db_occlusion_count2_hi_03db_occlusion_count3_low_03db_occlusion_count3_hi_03db_occlusion_count0_low_04db_occlusion_count0_hi_04db_occlusion_count1_low_04db_occlusion_count1_hi_04db_occlusion_count2_low_04db_occlusion_count2_hi_04db_occlusion_count3_low_04db_occlusion_count3_hi_04db_occlusion_count0_low_05db_occlusion_count0_hi_05db_occlusion_count1_low_05db_occlusion_count1_hi_05db_occlusion_count2_low_05db_occlusion_count2_hi_05db_occlusion_count3_low_05db_occlusion_count3_hi_05db_occlusion_count0_low_06db_occlusion_count0_hi_06db_occlusion_count1_low_06db_occlusion_count1_hi_06db_occlusion_count2_low_06db_occlusion_count2_hi_06db_occlusion_count3_low_06db_occlusion_count3_hi_06db_occlusion_count0_low_07db_occlusion_count0_hi_07db_occlusion_count1_low_07db_occlusion_count1_hi_07db_occlusion_count2_low_07db_occlusion_count2_hi_07db_occlusion_count3_low_07db_occlusion_count3_hi_07db_occlusion_count0_low_10db_occlusion_count0_hi_10db_occlusion_count1_low_10db_occlusion_count1_hi_10db_occlusion_count2_low_10db_occlusion_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WBSCL_CLAMP_Y_RGBWBSCL_CLAMP_CBCRWBSCL_OUTSIDE_PIX_STRATEGYWBSCL_OUTSIDE_PIX_STRATEGY_CBCRWBSCL_DEBUGWBSCL_TEST_DEBUG_INDEXWBSCL_TEST_DEBUG_DATAWB_WARM_UP_MODE_CTL1WB_WARM_UP_MODE_CTL2dcn20_dwbc_maskDISPCLK_R_WB_GATE_DISDISPCLK_G_WB_GATE_DISDISPCLK_G_WBSCL_GATE_DISWB_TEST_CLK_SELWB_LB_LS_DISWB_LB_SD_DISWB_LUT_LS_DISWBSCL_LB_MEM_PWR_MODE_SELWBSCL_LB_MEM_PWR_DISWBSCL_LB_MEM_PWR_FORCEWBSCL_LB_MEM_PWR_STATEWB_RAM_PW_SAVE_MODEWBSCL_LUT_MEM_PWR_STATECNV_OUT_BPCCNV_FRAME_CAPTURE_RATECNV_WINDOW_CROP_ENCNV_STEREO_TYPECNV_INTERLACED_MODECNV_EYE_SELECTIONCNV_STEREO_POLARITYCNV_INTERLACED_FIELD_ORDERCNV_STEREO_SPLITCNV_NEW_CONTENTCNV_FRAME_CAPTURE_EN_CURRENTCNV_FRAME_CAPTURE_ENCNV_WINDOW_START_XCNV_WINDOW_START_YCNV_WINDOW_WIDTHCNV_WINDOW_HEIGHTCNV_UPDATE_PENDINGCNV_UPDATE_TAKENCNV_UPDATE_LOCKCNV_SOURCE_WIDTHCNV_SOURCE_HEIGHTCNV_TEST_CRC_ENCNV_TEST_CRC_CONT_ENCNV_TEST_CRC_RED_MASKCNV_TEST_CRC_SIG_REDCNV_TEST_CRC_GREEN_MASKCNV_TEST_CRC_SIG_GREENCNV_TEST_CRC_BLUE_MASKCNV_TEST_CRC_SIG_BLUEWB_DEBUG_ENWB_DEBUG_SELWB_DBG_MODE_ENWB_DBG_DIN_FMTWB_DBG_36MODEWB_DBG_CMAPWB_DBG_PXLRATE_ERRORWB_DBG_SOURCE_WIDTHCNV_TEST_DEBUG_WRITE_ENWBSCL_COEF_RAM_TAP_PAIR_IDXWBSCL_COEF_RAM_PHASEWBSCL_COEF_RAM_FILTER_TYPEWBSCL_COEF_RAM_SELWBSCL_COEF_RAM_SEL_CURRENTWBSCL_COEF_RAM_RD_SELWBSCL_COEF_RAM_EVEN_TAP_COEFWBSCL_COEF_RAM_EVEN_TAP_COEF_ENWBSCL_COEF_RAM_ODD_TAP_COEFWBSCL_COEF_RAM_ODD_TAP_COEF_ENWBSCL_OUT_BIT_DEPTHWBSCL_V_NUM_OF_TAPS_Y_RGBWBSCL_V_NUM_OF_TAPS_CBCRWBSCL_H_NUM_OF_TAPS_Y_RGBWBSCL_H_NUM_OF_TAPS_CBCRWBSCL_DEST_HEIGHTWBSCL_DEST_WIDTHWBSCL_H_SCALE_RATIOWBSCL_H_INIT_FRAC_Y_RGBWBSCL_H_INIT_INT_Y_RGBWBSCL_H_INIT_FRAC_CBCRWBSCL_H_INIT_INT_CBCRWBSCL_V_SCALE_RATIOWBSCL_V_INIT_FRAC_Y_RGBWBSCL_V_INIT_INT_Y_RGBWBSCL_V_INIT_FRAC_CBCRWBSCL_V_INIT_INT_CBCRWBSCL_ROUND_OFFSET_Y_RGBWBSCL_ROUND_OFFSET_CBCRWBSCL_DATA_OVERFLOW_FLAGWBSCL_DATA_OVERFLOW_ACKWBSCL_DATA_OVERFLOW_MASKWBSCL_DATA_OVERFLOW_INT_STATUSWBSCL_DATA_OVERFLOW_INT_TYPEWBSCL_HOST_CONFLICT_FLAGWBSCL_HOST_CONFLICT_ACKWBSCL_HOST_CONFLICT_MASKWBSCL_HOST_CONFLICT_INT_STATUSWBSCL_HOST_CONFLICT_INT_TYPEWBSCL_TEST_CRC_ENWBSCL_TEST_CRC_CONT_ENWBSCL_TEST_CRC_RED_MASKWBSCL_TEST_CRC_SIG_REDWBSCL_TEST_CRC_GREEN_MASKWBSCL_TEST_CRC_SIG_GREENWBSCL_TEST_CRC_BLUE_MASKWBSCL_TEST_CRC_SIG_BLUEWB_MCIF_Y_MAX_BACKPRESSUREWB_MCIF_C_MAX_BACKPRESSUREWBSCL_CLAMP_UPPER_Y_RGBWBSCL_CLAMP_LOWER_Y_RGBWBSCL_CLAMP_UPPER_CBCRWBSCL_CLAMP_LOWER_CBCRWBSCL_BLACK_COLOR_G_YWBSCL_BLACK_COLOR_B_CBWBSCL_BLACK_COLOR_R_CRWBSCL_TEST_DEBUG_WRITE_ENWIDTH_WARMUPHEIGHT_WARMUPGMC_WARM_UP_ENABLEDATA_VALUE_WARMUPMODE_WARMUPDATA_DEPTH_WARMUPdcn20_dwbc_shiftdcn20_dwbcdcn20_mmhubbub_registersdcn20_mmhubbub_maskdcn20_mmhubbub_shiftdcn20_mmhubbubDCN20_CLK_SRC_PLL2DCN20_CLK_SRC_PLL3DCN20_CLK_SRC_PLL4DCN20_CLK_SRC_TOTAL_DCN21dcn315_resource_pooldcn31_afmt_registersdcn31_afmt_shiftAFMT_MEM_PWR_DISAFMT_MEM_PWR_STATEdcn31_afmt_maskdcn31_afmtdcn31_clk_src_array_idDCN31_CLK_SRC_PLL0DCN31_CLK_SRC_PLL1DCN31_CLK_SRC_PLL2DCN31_CLK_SRC_PLL3DCN31_CLK_SRC_PLL4DCN30_CLK_SRC_TOTALdcn35_resource_poolDPP_FGCG_REP_DISdcn35_dpp_shiftdcn35_dpp_maskdcn35_opp_registersOPP_TOP_CLK_CONTROLOPP_FGCG_REP_DISdcn35_opp_shiftdcn35_opp_maskDSC_FGCG_REP_DISdcn35_dsc_shiftdcn35_dsc_maskpg_cntl_shiftIPS2IPS1IPS0IPS0_AllDOMAIN_DESIRED_PWR_STATEpg_cntl_maskpg_cntl_registersLONO_STATEDOMAIN22_PG_CONFIGDOMAIN23_PG_CONFIGDOMAIN24_PG_CONFIGDOMAIN25_PG_CONFIGDOMAIN22_PG_STATUSDOMAIN23_PG_STATUSDOMAIN24_PG_STATUSDOMAIN25_PG_STATUSDWB_FGCG_REP_DISdcn35_dwbc_maskdcn35_dwbc_shiftdcn35_mmhubbub_registersMMHUBBUB_CLOCK_CNTLMMHUBBUB_TEST_CLK_SELDISPCLK_R_MMHUBBUB_GATE_DISDISPCLK_G_WBIF0_GATE_DISSOCCLK_G_WBIF0_GATE_DISMMHUBBUB_FGCG_REP_DISdcn35_mmhubbub_maskdcn35_mmhubbub_shiftdcn35_clk_src_array_idDCN35_CLK_SRC_PLL0DCN35_CLK_SRC_PLL1DCN35_CLK_SRC_PLL2DCN35_CLK_SRC_PLL3DCN35_CLK_SRC_PLL4DCN35_CLK_SRC_TOTALdcn_otg_statev_blank_startv_blank_endv_sync_a_polv_total_min_selv_total_max_selv_sync_a_startv_sync_a_endh_blank_starth_blank_endh_sync_a_starth_sync_a_endh_sync_a_polotg_enabledblank_enabledvertical_interrupt1_envertical_interrupt1_linevertical_interrupt2_envertical_interrupt2_linedcn10_hubbubtripleBuffer_enableDC_TRIPLEBUFFER_DISABLEDC_TRIPLEBUFFER_ENABLECURSOR_PITCH_64_PIXELSCURSOR_PITCH_128_PIXELSCURSOR_PITCH_256_PIXELScursor_lines_per_chunkCURSOR_LINE_PER_CHUNK_1CURSOR_LINE_PER_CHUNK_2CURSOR_LINE_PER_CHUNK_4CURSOR_LINE_PER_CHUNK_8CURSOR_LINE_PER_CHUNK_16gamut_remap_selectGAMUT_REMAP_BYPASSGAMUT_REMAP_COEFFGAMUT_REMAP_COMA_COEFFGAMUT_REMAP_COMB_COEFFdc_lut_modeLUT_BYPASSLUT_RAM_ALUT_RAM_BDCN3_xfer_func_shiftfield_region_start_baseDCN3_xfer_func_maskdcn3_xfer_func_regoffset_boffset_goffset_rstart_base_cntl_bstart_base_cntl_gstart_base_cntl_rcm_gamut_remap_selectCM_GAMUT_REMAP_MODE_BYPASSCM_GAMUT_REMAP_MODE_RAMA_COEFFCM_GAMUT_REMAP_MODE_RAMB_COEFFCM_GAMUT_REMAP_MODE_RESERVEDdcn_pg_cntldc_plane_pipe_poolpipes_assigned_to_planepipe_usednum_pipes_assigned_to_plane_for_mpcc_combinenum_pipes_assigned_to_plane_for_odm_combineodm_factorodm_slice_end_xnext_higher_pipe_for_odm_slicempc_factordc_pipe_mapping_scratchodm_infompc_infopipe_poolcsc_color_modeCSC_COLOR_MODE_GRAPHICS_BYPASSCSC_COLOR_MODE_GRAPHICS_PREDEFINEDCSC_COLOR_MODE_GRAPHICS_OUTPUT_CSCgrph_color_adjust_optionGRPH_COLOR_MATRIX_HW_DEFAULTGRPH_COLOR_MATRIX_SWinput_csc_matrixinit_int_and_fracfractionram_filter_typeFILTER_TYPE_RGB_Y_VERTICALFILTER_TYPE_CBCR_VERTICALFILTER_TYPE_RGB_Y_HORIZONTALFILTER_TYPE_CBCR_HORIZONTALFILTER_TYPE_ALPHA_VERTICALFILTER_TYPE_ALPHA_HORIZONTALsclv_ratios_initsh_int_scale_ratio_lumah_int_scale_ratio_chromav_int_scale_ratio_lumav_int_scale_ratio_chromah_init_lumah_init_chromav_init_lumav_init_chromadmub_srv_common_reg_offsetDMCUB_CNTLDMCUB_MEM_CNTLDMCUB_SEC_CNTLDMCUB_INBOX0_SIZEDMCUB_INBOX0_RPTRDMCUB_INBOX0_WPTRDMCUB_INBOX1_BASE_ADDRESSDMCUB_INBOX1_SIZEDMCUB_INBOX1_RPTRDMCUB_INBOX1_WPTRDMCUB_OUTBOX0_BASE_ADDRESSDMCUB_OUTBOX0_SIZEDMCUB_OUTBOX0_RPTRDMCUB_OUTBOX0_WPTRDMCUB_OUTBOX1_BASE_ADDRESSDMCUB_OUTBOX1_SIZEDMCUB_OUTBOX1_RPTRDMCUB_OUTBOX1_WPTRDMCUB_REGION3_CW0_OFFSETDMCUB_REGION3_CW1_OFFSETDMCUB_REGION3_CW2_OFFSETDMCUB_REGION3_CW3_OFFSETDMCUB_REGION3_CW4_OFFSETDMCUB_REGION3_CW5_OFFSETDMCUB_REGION3_CW6_OFFSETDMCUB_REGION3_CW7_OFFSETDMCUB_REGION3_CW0_OFFSET_HIGHDMCUB_REGION3_CW1_OFFSET_HIGHDMCUB_REGION3_CW2_OFFSET_HIGHDMCUB_REGION3_CW3_OFFSET_HIGHDMCUB_REGION3_CW4_OFFSET_HIGHDMCUB_REGION3_CW5_OFFSET_HIGHDMCUB_REGION3_CW6_OFFSET_HIGHDMCUB_REGION3_CW7_OFFSET_HIGHDMCUB_REGION3_CW0_BASE_ADDRESSDMCUB_REGION3_CW1_BASE_ADDRESSDMCUB_REGION3_CW2_BASE_ADDRESSDMCUB_REGION3_CW3_BASE_ADDRESSDMCUB_REGION3_CW4_BASE_ADDRESSDMCUB_REGION3_CW5_BASE_ADDRESSDMCUB_REGION3_CW6_BASE_ADDRESSDMCUB_REGION3_CW7_BASE_ADDRESSDMCUB_REGION3_CW0_TOP_ADDRESSDMCUB_REGION3_CW1_TOP_ADDRESSDMCUB_REGION3_CW2_TOP_ADDRESSDMCUB_REGION3_CW3_TOP_ADDRESSDMCUB_REGION3_CW4_TOP_ADDRESSDMCUB_REGION3_CW5_TOP_ADDRESSDMCUB_REGION3_CW6_TOP_ADDRESSDMCUB_REGION3_CW7_TOP_ADDRESSDMCUB_REGION4_OFFSETDMCUB_REGION4_OFFSET_HIGHDMCUB_REGION4_TOP_ADDRESSDMCUB_REGION5_OFFSETDMCUB_REGION5_OFFSET_HIGHDMCUB_REGION5_TOP_ADDRESSDMCUB_SCRATCH0DMCUB_SCRATCH1DMCUB_SCRATCH2DMCUB_SCRATCH3DMCUB_SCRATCH4DMCUB_SCRATCH5DMCUB_SCRATCH6DMCUB_SCRATCH7DMCUB_SCRATCH8DMCUB_SCRATCH9DMCUB_SCRATCH10DMCUB_SCRATCH11DMCUB_SCRATCH12DMCUB_SCRATCH13DMCUB_SCRATCH14DMCUB_GPINT_DATAIN1CC_DC_PIPE_DISMMHUBBUB_SOFT_RESETDMCUB_INTERRUPT_ACKDMCUB_TIMER_CURRENTDMCUB_INST_FETCH_FAULT_ADDRDMCUB_UNDEFINED_ADDRESS_FAULT_ADDRDMCUB_DATA_WRITE_FAULT_ADDRdmub_srv_common_reg_shiftDMCUB_CNTL__DMCUB_ENABLEDMCUB_CNTL__DMCUB_SOFT_RESETDMCUB_CNTL__DMCUB_TRACEPORT_ENDMCUB_MEM_CNTL__DMCUB_MEM_READ_SPACEDMCUB_MEM_CNTL__DMCUB_MEM_WRITE_SPACEDMCUB_SEC_CNTL__DMCUB_SEC_RESETDMCUB_SEC_CNTL__DMCUB_MEM_UNIT_IDDMCUB_SEC_CNTL__DMCUB_SEC_RESET_STATUSDMCUB_REGION3_CW0_TOP_ADDRESS__DMCUB_REGION3_CW0_TOP_ADDRESSDMCUB_REGION3_CW0_TOP_ADDRESS__DMCUB_REGION3_CW0_ENABLEDMCUB_REGION3_CW1_TOP_ADDRESS__DMCUB_REGION3_CW1_TOP_ADDRESSDMCUB_REGION3_CW1_TOP_ADDRESS__DMCUB_REGION3_CW1_ENABLEDMCUB_REGION3_CW2_TOP_ADDRESS__DMCUB_REGION3_CW2_TOP_ADDRESSDMCUB_REGION3_CW2_TOP_ADDRESS__DMCUB_REGION3_CW2_ENABLEDMCUB_REGION3_CW3_TOP_ADDRESS__DMCUB_REGION3_CW3_TOP_ADDRESSDMCUB_REGION3_CW3_TOP_ADDRESS__DMCUB_REGION3_CW3_ENABLEDMCUB_REGION3_CW4_TOP_ADDRESS__DMCUB_REGION3_CW4_TOP_ADDRESSDMCUB_REGION3_CW4_TOP_ADDRESS__DMCUB_REGION3_CW4_ENABLEDMCUB_REGION3_CW5_TOP_ADDRESS__DMCUB_REGION3_CW5_TOP_ADDRESSDMCUB_REGION3_CW5_TOP_ADDRESS__DMCUB_REGION3_CW5_ENABLEDMCUB_REGION3_CW6_TOP_ADDRESS__DMCUB_REGION3_CW6_TOP_ADDRESSDMCUB_REGION3_CW6_TOP_ADDRESS__DMCUB_REGION3_CW6_ENABLEDMCUB_REGION3_CW7_TOP_ADDRESS__DMCUB_REGION3_CW7_TOP_ADDRESSDMCUB_REGION3_CW7_TOP_ADDRESS__DMCUB_REGION3_CW7_ENABLEDMCUB_REGION4_TOP_ADDRESS__DMCUB_REGION4_TOP_ADDRESSDMCUB_REGION4_TOP_ADDRESS__DMCUB_REGION4_ENABLEDMCUB_REGION5_TOP_ADDRESS__DMCUB_REGION5_TOP_ADDRESSDMCUB_REGION5_TOP_ADDRESS__DMCUB_REGION5_ENABLECC_DC_PIPE_DIS__DC_DMCUB_ENABLEMMHUBBUB_SOFT_RESET__DMUIF_SOFT_RESETDCN_VM_FB_LOCATION_BASE__FB_BASEDCN_VM_FB_OFFSET__FB_OFFSETDMCUB_INTERRUPT_ACK__DMCUB_OUTBOX0_READY_INT_ACKdmub_srv_common_reg_maskdmub_srv_dcn31_reg_offsetDMCUB_CNTL2DMCUB_GPINT_DATAOUTDMCUB_INTERRUPT_ENABLEdmub_srv_dcn31_reg_shiftDMCUB_CNTL2__DMCUB_SOFT_RESETDMCUB_INBOX0_WPTR__DMCUB_INBOX0_WPTRDMCUB_INTERRUPT_ENABLE__DMCUB_GPINT_IH_INT_ENDMCUB_INTERRUPT_ACK__DMCUB_GPINT_IH_INT_ACKDMCUB_CNTL__DMCUB_PWAIT_MODE_STATUSdmub_srv_dcn31_reg_maskmod_hdcp_eventMOD_HDCP_EVENT_CALLBACKMOD_HDCP_EVENT_WATCHDOG_TIMEOUTMOD_HDCP_EVENT_CPIRQmod_hdcp_trans_input_resultPASSFAILmod_hdcp_event_contextrx_id_list_readyunexpected_eventmod_hdcp_hdcp1_state_idHDCP1_STATE_STARTH1_A0_WAIT_FOR_ACTIVE_RXH1_A1_EXCHANGE_KSVSH1_A2_COMPUTATIONS_A3_VALIDATE_RX_A6_TEST_FOR_REPEATERH1_A45_AUTHENTICATEDH1_A8_WAIT_FOR_READYH1_A9_READ_KSV_LISTHDCP1_STATE_ENDmod_hdcp_hdcp1_dp_state_idHDCP1_DP_STATE_STARTD1_A0_DETERMINE_RX_HDCP_CAPABLED1_A1_EXCHANGE_KSVSD1_A23_WAIT_FOR_R0_PRIMED1_A2_COMPUTATIONS_A3_VALIDATE_RX_A5_TEST_FOR_REPEATERD1_A4_AUTHENTICATEDD1_A6_WAIT_FOR_READYD1_A7_READ_KSV_LISTHDCP1_DP_STATE_ENDmod_hdcp_actionmod_hdcp_hdcp2_state_idHDCP2_STATE_STARTH2_A0_KNOWN_HDCP2_CAPABLE_RXH2_A1_SEND_AKE_INITH2_A1_VALIDATE_AKE_CERTH2_A1_SEND_NO_STORED_KMH2_A1_READ_H_PRIMEH2_A1_READ_PAIRING_INFO_AND_VALIDATE_H_PRIMEH2_A1_SEND_STORED_KMH2_A1_VALIDATE_H_PRIMEH2_A2_LOCALITY_CHECKH2_A3_EXCHANGE_KS_AND_TEST_FOR_REPEATERH2_ENABLE_ENCRYPTIONH2_A5_AUTHENTICATEDH2_A6_WAIT_FOR_RX_ID_LISTH2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACKH2_A9_SEND_STREAM_MANAGEMENTH2_A9_VALIDATE_STREAM_READYHDCP2_STATE_ENDmod_hdcp_hdcp2_dp_state_idHDCP2_DP_STATE_STARTD2_A0_DETERMINE_RX_HDCP_CAPABLED2_A1_SEND_AKE_INITD2_A1_VALIDATE_AKE_CERTD2_A1_SEND_NO_STORED_KMD2_A1_READ_H_PRIMED2_A1_READ_PAIRING_INFO_AND_VALIDATE_H_PRIMED2_A1_SEND_STORED_KMD2_A1_VALIDATE_H_PRIMED2_A2_LOCALITY_CHECKD2_A34_EXCHANGE_KS_AND_TEST_FOR_REPEATERD2_SEND_CONTENT_STREAM_TYPED2_ENABLE_ENCRYPTIOND2_A5_AUTHENTICATEDD2_A6_WAIT_FOR_RX_ID_LISTD2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACKD2_A9_SEND_STREAM_MANAGEMENTD2_A9_VALIDATE_STREAM_READYHDCP2_DP_STATE_ENDHDCP_STATE_ENDCalculate256BBlockSizesCalculateMinAndMaxPrefetchModeNoChromaPlanesCalculateUnboundedRequestAndCompressedBufferSizeCalculateVMGroupAndRequestTimesDisplayPipeConfigurationXfactorGetScaledFractionModeSupportAndSystemConfiguration__amdgpu_xcp_switch_partition_modemca_rasmca_set__mca_smu_get_ras_mca_setdrm_bppis_navite_422_or_420_do_calc_rc_paramsacp_early_initacp_genpd_add_deviceacp_genpd_remove_deviceacp_hw_finiacp_hw_initacp_is_idleacp_poweroffacp_poweronacp_quirk_cbacp_resumeacp_set_clockgating_stateacp_set_powergating_stateacp_soft_resetacp_suspendacp_sw_finiacp_sw_initacp_wait_for_idleacquire_psp_cmd_bufadd_link_enc_assignmentodm_slice_indexadd_odm_slice_to_odm_treesmualdebaran_emit_clk_levelsaldebaran_force_clk_levelsaldebaran_get_allowed_feature_maskaldebaran_get_current_clk_freq_by_tablealdebaran_get_ecc_infoaldebaran_get_gpu_metricsaldebaran_get_power_limitaldebaran_get_thermal_temperature_rangealdebaran_get_unique_idaldebaran_i2c_control_finialdebaran_i2c_control_initaldebaran_i2c_funci2c_adapaldebaran_i2c_xferaldebaran_init_smc_tablesaldebaran_is_baco_supportedaldebaran_is_dpm_runningaldebaran_is_mode1_reset_supportedaldebaran_is_mode2_reset_supportedaldebaran_log_thermal_throttling_eventaldebaran_mode1_resetaldebaran_mode2_resetaldebaran_populate_umd_state_clkaldebaran_read_sensoraldebaran_select_xgmi_plpd_policyaldebaran_send_hbm_bad_channel_flagaldebaran_set_default_dpm_tablealdebaran_set_df_cstatealdebaran_set_mp1_statealdebaran_set_performance_levellimit_typealdebaran_set_power_limitaldebaran_set_ppt_funcsaldebaran_set_soft_freq_limited_rangealdebaran_setup_pptablealdebaran_smu_handle_passthrough_sbraldebaran_smu_send_hbm_bad_page_numaldebaran_store_powerplay_tablealdebaran_system_features_controlaldebaran_upload_dpm_levelaldebaran_usr_edit_dpm_tableallocate_hiq_mqdallocate_sdma_mqdallow_edp_hotplug_detection_fops_openallow_edp_hotplug_detection_getallow_edp_hotplug_detection_setamd_sriov_msg_checksumamdgpu_atom_asic_initamdgpu_atom_destroyamdgpu_atom_execute_tableamdgpu_atom_execute_table_lockedamdgpu_atom_parsefrevcrevamdgpu_atom_parse_cmd_headeramdgpu_atom_parse_data_headeramdgpu_atombios_crtc_adjust_pllamdgpu_atombios_crtc_blankamdgpu_atombios_crtc_enableamdgpu_atombios_crtc_lockamdgpu_atombios_crtc_overscan_setupamdgpu_atombios_crtc_powergateamdgpu_atombios_crtc_powergate_initamdgpu_atombios_crtc_prepare_pllamdgpu_atombios_crtc_program_pllamdgpu_atombios_crtc_program_ssamdgpu_atombios_crtc_scaler_setupclk_srcamdgpu_atombios_crtc_set_dce_clockamdgpu_atombios_crtc_set_disp_eng_pllamdgpu_atombios_crtc_set_dtd_timingamdgpu_atombios_crtc_set_pllamdgpu_atombios_encoder_dac_detectamdgpu_atombios_encoder_dig_detectamdgpu_atombios_encoder_dpmsamdgpu_atombios_encoder_fini_backlightamdgpu_atombios_encoder_get_backlight_brightnessamdgpu_atombios_encoder_get_backlight_levelamdgpu_atombios_encoder_get_backlight_level_from_regamdgpu_atombios_encoder_get_dig_infoamdgpu_atombios_encoder_get_encoder_modeamdgpu_atombios_encoder_get_lcd_infoamdgpu_atombios_encoder_init_backlightamdgpu_atombios_encoder_init_digamdgpu_atombios_encoder_is_digitalamdgpu_atombios_encoder_mode_fixupamdgpu_atombios_encoder_set_backlight_levelamdgpu_atombios_encoder_set_backlight_level_to_regamdgpu_atombios_encoder_set_bios_scratch_regsamdgpu_atombios_encoder_set_crtc_sourceamdgpu_atombios_encoder_set_edp_panel_poweramdgpu_atombios_encoder_setup_dacamdgpu_atombios_encoder_setup_digamdgpu_atombios_encoder_setup_dig_encoderlane_numlane_setamdgpu_atombios_encoder_setup_dig_transmitteramdgpu_atombios_encoder_setup_dvoamdgpu_atombios_encoder_setup_ext_encoder_ddcext_encoderamdgpu_atombios_encoder_setup_external_encoderamdgpu_atombios_encoder_update_backlight_statusamdgpu_bin_flash_attr_is_visiblevmboamdgpu_bo_add_to_shadow_listamdgpu_bo_createamdgpu_bo_create_kernelamdgpu_bo_create_kernel_atamdgpu_bo_create_reservedubo_ptramdgpu_bo_create_uservmbo_ptramdgpu_bo_create_vmamdgpu_bo_destroyamdgpu_bo_fault_reserve_notifyamdgpu_bo_fenceamdgpu_bo_finiamdgpu_bo_free_kernelamdgpu_bo_get_memoryamdgpu_bo_get_metadataamdgpu_bo_get_preferred_domainamdgpu_bo_get_tiling_flagsamdgpu_bo_gpu_offsetamdgpu_bo_gpu_offset_no_checkamdgpu_bo_initamdgpu_bo_is_amdgpu_boamdgpu_bo_kmapamdgpu_bo_kptramdgpu_bo_kunmapnew_memamdgpu_bo_move_notifyamdgpu_bo_pinmin_offsetmax_offsetamdgpu_bo_pin_restrictedaboamdgpu_bo_placement_from_domainamdgpu_bo_print_infoamdgpu_bo_refamdgpu_bo_release_notifyamdgpu_bo_restore_shadowamdgpu_bo_set_metadataamdgpu_bo_set_tiling_flagsbo_flagsamdgpu_bo_support_uswcamdgpu_bo_sync_waitamdgpu_bo_sync_wait_resvamdgpu_bo_unpinamdgpu_bo_unrefamdgpu_bo_user_destroyamdgpu_bo_vm_destroyvposhposetimeamdgpu_crtc_get_scanout_positionamdgpu_cs_bo_validateamdgpu_cs_fence_to_handle_ioctlamdgpu_cs_find_mappingmax_vis_bytesamdgpu_cs_get_threshold_for_movesamdgpu_cs_ioctlchunk_ibamdgpu_cs_job_idxamdgpu_cs_p2_dependenciesamdgpu_cs_parser_bosamdgpu_cs_parser_finiamdgpu_cs_pass1amdgpu_cs_pass2amdgpu_cs_patch_ibsnum_vis_bytesamdgpu_cs_report_moved_bytesamdgpu_cs_submitamdgpu_cs_sync_ringsamdgpu_cs_vm_handlingamdgpu_cs_wait_any_fenceamdgpu_cs_wait_fences_ioctlamdgpu_cs_wait_ioctlamdgpu_ctx_add_fenceamdgpu_ctx_allocamdgpu_ctx_do_releaseamdgpu_ctx_fence_timeamdgpu_ctx_finiamdgpu_ctx_getamdgpu_ctx_get_entityamdgpu_ctx_get_fenceamdgpu_ctx_init_entityamdgpu_ctx_ioctlamdgpu_ctx_mgr_entity_finiamdgpu_ctx_mgr_entity_flushamdgpu_ctx_mgr_finiamdgpu_ctx_mgr_initamdgpu_ctx_mgr_usagectx_prioamdgpu_ctx_priority_is_validamdgpu_ctx_priority_overrideamdgpu_ctx_putamdgpu_ctx_set_stable_pstateamdgpu_ctx_stable_pstateamdgpu_ctx_to_drm_sched_prioamdgpu_ctx_wait_prev_fenceamdgpu_current_bpc_openamdgpu_current_bpc_showamdgpu_current_colorspace_openamdgpu_current_colorspace_showamdgpu_detect_virtualizationamdgpu_dirtyfbamdgpu_display_crtc_idx_to_irq_typepage_flip_flagsamdgpu_display_crtc_page_flip_targetamdgpu_display_crtc_scaling_mode_fixupamdgpu_display_crtc_set_configuse_auxamdgpu_display_ddc_probeamdgpu_display_flip_callback__workamdgpu_display_flip_work_funcrfbamdgpu_display_framebuffer_initamdgpu_display_get_crtc_scanoutposamdgpu_display_hotplug_work_funcamdgpu_display_modeset_create_propsamdgpu_display_print_display_setupamdgpu_display_resume_helperamdgpu_display_supported_domainsamdgpu_display_suspend_helperamdgpu_display_unpin_work_funcamdgpu_display_update_priorityamdgpu_display_user_framebuffer_createblock_size_log2amdgpu_display_verify_planeamdgpu_display_verify_sizesamdgpu_dm_encoder_destroyamdgpu_dm_initialize_dp_connectoramdgpu_dm_mst_connector_early_unregisteramdgpu_dm_mst_connector_late_registeramdgpu_dm_plane_add_gfx10_3_modifiersamdgpu_dm_plane_add_gfx11_modifiersamdgpu_dm_plane_add_gfx9_modifiersamdgpu_dm_plane_add_modifieramdgpu_dm_plane_atomic_async_checkamdgpu_dm_plane_atomic_async_updateamdgpu_dm_plane_atomic_checkamdgpu_dm_plane_drm_plane_destroy_stateamdgpu_dm_plane_drm_plane_duplicate_stateamdgpu_dm_plane_drm_plane_resetamdgpu_dm_plane_fill_blending_from_plane_stateamdgpu_dm_plane_fill_dc_scaling_infoafbforce_disable_dccamdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiersamdgpu_dm_plane_fill_plane_buffer_attributesamdgpu_dm_plane_format_mod_supportedamdgpu_dm_plane_get_format_infoamdgpu_dm_plane_get_plane_modifiersamdgpu_dm_plane_handle_cursor_updateamdgpu_dm_plane_helper_check_stateamdgpu_dm_plane_helper_cleanup_fbamdgpu_dm_plane_helper_prepare_fbplane_capamdgpu_dm_plane_initamdgpu_dm_plane_is_video_formatamdgpu_dm_wb_cleanup_jobamdgpu_dm_wb_connector_get_modeswbconamdgpu_dm_wb_connector_initamdgpu_dm_wb_encoder_atomic_checkamdgpu_dm_wb_prepare_jobamdgpu_dpm_baco_enteramdgpu_dpm_baco_exitamdgpu_dpm_baco_resetamdgpu_dpm_compute_clocksamdgpu_dpm_debugfs_print_current_performance_leveltask_idamdgpu_dpm_dispatch_taskamdgpu_dpm_display_clock_voltage_requestamdgpu_dpm_display_configuration_changedisable_memory_clock_switchamdgpu_dpm_display_disable_memory_clock_switchamdgpu_dpm_emit_clock_levelsamdgpu_dpm_enable_gfx_featuresamdgpu_dpm_enable_jpegamdgpu_dpm_enable_mgpu_fan_boostamdgpu_dpm_enable_uvdamdgpu_dpm_enable_vceamdgpu_dpm_enable_vpeamdgpu_dpm_force_clock_levelamdgpu_dpm_force_performance_levelamdgpu_dpm_get_apu_thermal_limitamdgpu_dpm_get_clock_by_typeamdgpu_dpm_get_clock_by_type_with_latencyamdgpu_dpm_get_clock_by_type_with_voltageamdgpu_dpm_get_current_clocksamdgpu_dpm_get_current_power_stateamdgpu_dpm_get_display_mode_validation_clksamdgpu_dpm_get_dpm_clock_tableamdgpu_dpm_get_dpm_freq_rangeamdgpu_dpm_get_ecc_infoamdgpu_dpm_get_entrycount_gfxoffamdgpu_dpm_get_fan_control_modeamdgpu_dpm_get_fan_speed_pwmamdgpu_dpm_get_fan_speed_rpmamdgpu_dpm_get_gpu_metricsmax_clocksamdgpu_dpm_get_max_sustainable_clocks_by_dcamdgpu_dpm_get_mclkamdgpu_dpm_get_mclk_odamdgpu_dpm_get_num_cpu_coresamdgpu_dpm_get_performance_levelpm_metricsamdgpu_dpm_get_pm_metricspp_limit_levelpower_typeamdgpu_dpm_get_power_limitamdgpu_dpm_get_power_profile_modeamdgpu_dpm_get_pp_num_statesamdgpu_dpm_get_pp_tableamdgpu_dpm_get_ppfeature_statusamdgpu_dpm_get_residency_gfxoffamdgpu_dpm_get_sclkamdgpu_dpm_get_sclk_odamdgpu_dpm_get_smu_prv_buf_detailsamdgpu_dpm_get_status_gfxoffamdgpu_dpm_ge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llamdgpu_atif_get_notification_paramsamdgpu_atif_get_sbios_requestsamdgpu_atif_handleramdgpu_atif_pci_probe_handleamdgpu_atif_query_backlight_capsamdgpu_atif_verify_interfaceamdgpu_atomfirmware_allocate_fb_scratchfb_resetamdgpu_atomfirmware_asic_initamdgpu_atomfirmware_dynamic_boot_config_supportedamdgpu_atomfirmware_get_clock_infoamdgpu_atomfirmware_get_fw_reserved_fb_sizeamdgpu_atomfirmware_get_gfx_infoamdgpu_atomfirmware_get_vram_infoamdgpu_atomfirmware_gpu_virtualization_supportedamdgpu_atomfirmware_mem_ecc_supportedamdgpu_atomfirmware_mem_training_supportedamdgpu_atomfirmware_query_firmware_capabilityamdgpu_atomfirmware_ras_rom_addramdgpu_atomfirmware_scratch_regs_initamdgpu_atomfirmware_sram_ecc_supportedamdgpu_atpx_callamdgpu_atpx_detectamdgpu_atpx_dgpu_req_power_for_displaysamdgpu_atpx_get_client_idamdgpu_atpx_get_dhandleamdgpu_atpx_get_quirksamdgpu_atpx_pci_probe_handleamdgpu_atpx_power_stateamdgpu_atpx_switchtoamdgpu_atpx_validateatrm_handleamdgpu_atrm_callamdgpu_atrm_get_biosamdgpu_block_invalid_rregamdgpu_block_invalid_wreginfo_paramamdgpu_bo_create_list_entry_arrayamdgpu_bo_delete_mem_notifyamdgpu_bo_list_createamdgpu_bo_list_entry_cmpamdgpu_bo_list_free_rcuamdgpu_bo_list_getamdgpu_bo_list_ioctlamdgpu_bo_list_putamdgpu_bo_moveamdgpu_board_attrs_is_visibleamdgpu_choose_low_power_stateamdgpu_connector_addamdgpu_connector_add_common_modesamdgpu_connector_best_single_encoderamdgpu_connector_destroyamdgpu_connector_dp_detectamdgpu_connector_dp_get_modesamdgpu_connector_dp_mode_validamdgpu_connector_dvi_detectamdgpu_connector_dvi_encoderamdgpu_connector_dvi_forceamdgpu_connector_dvi_mode_validamdgpu_connector_edidamdgpu_connector_encoder_get_dp_bridge_encoder_idamdgpu_connector_find_encoderamdgpu_connector_fixup_lcd_native_modeamdgpu_connector_get_edidamdgpu_connector_get_monitor_bpcamdgpu_connector_hotplugamdgpu_connector_is_dp12_capableamdgpu_connector_late_registeramdgpu_connector_lcd_native_modeamdgpu_connector_lvds_detectamdgpu_connector_lvds_get_modesamdgpu_connector_lvds_mode_validamdgpu_connector_property_change_modeamdgpu_connector_set_lcd_propertyamdgpu_connector_set_propertyamdgpu_connector_unregisteramdgpu_connector_update_scratch_regsamdgpu_connector_vga_detectamdgpu_connector_vga_get_modesamdgpu_connector_vga_mode_validdirect_submitamdgpu_copy_bufferamdgpu_debugfs_gem_info_openamdgpu_debugfs_gem_info_showamdgpu_debugfs_gem_initamdgpu_debugfs_sa_info_openamdgpu_debugfs_sa_info_showamdgpu_debugfs_sa_initamdgpu_debugfs_vcn_fwlog_initamdgpu_debugfs_vcn_fwlog_readamdgpu_debugfs_vm_bo_infoamdgpu_device_aper_accessamdgpu_device_asic_has_dc_supportamdgpu_device_asic_initamdgpu_device_baco_enteramdgpu_device_baco_exitamdgpu_device_cache_pci_stateamdgpu_device_check_argumentsamdgpu_device_check_smu_prv_buffer_sizeamdgpu_device_delay_enable_gfx_offamdgpu_device_delayed_init_work_handleramdgpu_device_enable_virtual_displayamdgpu_device_fill_reset_magicamdgpu_device_fini_hwamdgpu_device_fini_swamdgpu_device_flush_hdpamdgpu_device_fw_loadingamdgpu_device_get_board_infoamdgpu_device_get_job_timeout_settingsamdgpu_device_get_pcie_infoamdgpu_device_get_pcie_replay_countamdgpu_device_get_rev_idreset_contextamdgpu_device_gpu_recoveramdgpu_device_haltamdgpu_device_has_dc_supportamdgpu_device_has_display_hardwareamdgpu_device_has_job_runningreg_addramdgpu_device_indirect_rregamdgpu_device_indirect_rreg64amdgpu_device_indirect_rreg64_extamdgpu_device_indirect_rreg_extamdgpu_device_indirect_wregamdgpu_device_indirect_wreg64amdgpu_device_indirect_wreg64_extamdgpu_device_indirect_wreg_extamdgpu_device_initamdgpu_device_init_schedulersamdgpu_device_invalidate_hdpip_block_versionamdgpu_device_ip_block_addamdgpu_device_ip_block_version_cmpamdgpu_device_ip_check_soft_resetamdgpu_device_ip_early_initamdgpu_device_ip_finiamdgpu_device_ip_fini_earlyamdgpu_device_ip_get_clockgating_stateamdgpu_device_ip_get_ip_blockamdgpu_device_ip_initamdgpu_device_ip_is_idleamdgpu_device_ip_late_initamdgpu_device_ip_need_full_resetamdgpu_device_ip_resume_phase1amdgpu_device_ip_resume_phase2amdgpu_device_ip_set_clockgating_stateamdgpu_device_ip_set_powergating_stateamdgpu_device_ip_suspendamdgpu_device_ip_suspend_phase1amdgpu_device_ip_suspend_phase2amdgpu_device_ip_wait_for_idlepeer_adevamdgpu_device_is_peer_accessibleamdgpu_device_load_pci_stateamdgpu_device_mm_accessamdgpu_device_mode1_resetamdgpu_device_need_postamdgpu_device_parse_gpu_info_fwamdgpu_device_pci_config_resetamdgpu_device_pci_resetamdgpu_device_pcie_port_rregamdgpu_device_pcie_port_wregamdgpu_device_pre_asic_resetamdgpu_device_prepareamdgpu_device_program_register_sequenceamdgpu_device_read_biosamdgpu_device_recover_vramamdgpu_device_reset_sriovamdgpu_device_resize_fb_barfbconamdgpu_device_resumeamdgpu_device_rregamdgpu_device_seamless_boot_supportedamdgpu_device_set_cg_stateamdgpu_device_set_pg_stateamdgpu_device_set_sriov_virtual_displayamdgpu_device_should_recover_gpuamdgpu_device_should_use_aspmamdgpu_device_skip_hw_accessamdgpu_device_supports_bacoamdgpu_device_supports_bocoamdgpu_device_supports_pxamdgpu_device_supports_smart_shiftamdgpu_device_suspendamdgpu_device_switch_gangamdgpu_device_unmap_mmioamdgpu_device_vga_set_decodeamdgpu_device_vram_accessexpected_valueamdgpu_device_wait_on_rregamdgpu_device_wb_freeamdgpu_device_wb_getamdgpu_device_wb_initamdgpu_device_wregamdgpu_device_xcc_rregamdgpu_device_xcc_wregamdgpu_device_xgmi_reset_funcamdgpu_dig_monitor_is_duallinkamdgpu_discovery_finiamdgpu_discovery_get_gfx_infoamdgpu_discovery_initamdgpu_discovery_read_binary_from_fileamdgpu_discovery_read_binary_from_sysmemvcn_harvest_countumc_harvest_countamdgpu_discovery_read_from_harvest_tableamdgpu_discovery_read_harvest_bit_per_ipamdgpu_discovery_reg_base_initamdgpu_discovery_set_common_ip_blocksamdgpu_discovery_set_display_ip_blocksamdgpu_discovery_set_gc_ip_blocksamdgpu_discovery_set_gmc_ip_blocksamdgpu_discovery_set_ih_ip_blocksamdgpu_discovery_set_ip_blocksamdgpu_discovery_set_mm_ip_blocksamdgpu_discovery_set_psp_ip_blocksamdgpu_discovery_set_sdma_ip_blocksamdgpu_discovery_set_smu_ip_blocksamdgpu_discovery_sysfs_finiamdgpu_discovery_sysfs_init_ip_offsetreg_base_64amdgpu_discovery_sysfs_ipsamdgpu_dm_hpd_finiamdgpu_dm_hpd_initamdgpu_dm_init_color_modamdgpu_dm_irq_finiamdgpu_dm_irq_handleramdgpu_dm_irq_initint_paramshandler_argsamdgpu_dm_irq_register_interruptamdgpu_dm_irq_resume_earlyamdgpu_dm_irq_resume_lateamdgpu_dm_irq_suspendamdgpu_dm_irq_unregister_interruptamdgpu_dm_outbox_initamdgpu_dm_plane_set_color_propertiesamdgpu_dm_set_crtc_irq_stateamdgpu_dm_set_dmub_outbox_irq_stateamdgpu_dm_set_dmub_trace_irq_stateamdgpu_dm_set_hpd_irq_stateamdgpu_dm_set_irq_funcsamdgpu_dm_set_pflip_irq_stateamdgpu_dm_set_vline0_irq_stateamdgpu_dm_set_vupdate_irq_stateamdgpu_dm_update_crtc_color_mgmtamdgpu_dm_update_plane_color_mgmtamdgpu_dm_verify_lut3d_sizeamdgpu_dm_verify_lut_sizesamdgpu_dma_buf_attachamdgpu_dma_buf_begin_cpu_accessamdgpu_dma_buf_detachamdgpu_dma_buf_mapamdgpu_dma_buf_move_notifyamdgpu_dma_buf_pinamdgpu_dma_buf_unmapamdgpu_dma_buf_unpinamdgpu_dmabuf_is_xgmi_accessibledevice_list_handleamdgpu_do_asic_resetamdgpu_dpm_get_active_displaysamdgpu_dpm_get_vblank_timeamdgpu_dpm_get_vrefreshmanplaceamdgpu_dummy_vram_mgr_compatibleprinteramdgpu_dummy_vram_mgr_debugamdgpu_dummy_vram_mgr_delamdgpu_dummy_vram_mgr_intersectsamdgpu_dummy_vram_mgr_newamdgpu_eeprom_readamdgpu_eeprom_writeamdgpu_eeprom_xferamdgpu_encoder_get_dp_bridge_encoder_idamdgpu_encoder_set_active_deviceamdgpu_evict_flagsamdgpu_fill_bufferamdgpu_fru_get_product_infoamdgpu_fru_id_showamdgpu_fru_manufacturer_name_showamdgpu_fru_product_name_showamdgpu_fru_product_number_showamdgpu_fru_serial_number_showamdgpu_fru_sysfs_finiamdgpu_fru_sysfs_initamdgpu_fw_attestation_debugfs_initamdgpu_fw_attestation_debugfs_readamdgpu_gem_create_ioctlamdgpu_gem_faultamdgpu_gem_force_releaseamdgpu_gem_metadata_ioctlamdgpu_gem_mmap_ioctlamdgpu_gem_object_closeinitial_domainamdgpu_gem_object_createamdgpu_gem_object_freeamdgpu_gem_object_mmapamdgpu_gem_object_openamdgpu_gem_op_ioctlamdgpu_gem_prime_exportamdgpu_gem_prime_importamdgpu_gem_timeoutamdgpu_gem_userptr_ioctlamdgpu_gem_va_ioctlamdgpu_gem_va_map_flagsamdgpu_gem_wait_idle_ioctlamdgpu_get_biosamdgpu_get_connector_for_encoderamdgpu_get_connector_for_encoder_initamdgpu_get_external_encoderamdgpu_get_native_modeamdgpu_get_xgmi_hiveamdgpu_has_atpxamdgpu_has_atpx_dgpu_power_cntlamdgpu_hdp_ras_sw_initamdgpu_ib_freeamdgpu_ib_getamdgpu_ib_pool_finiamdgpu_ib_pool_initamdgpu_ib_ring_testsamdgpu_ib_scheduleamdgpu_in_resetamdgpu_invalid_rregamdgpu_invalid_rreg64amdgpu_invalid_rreg64_extamdgpu_invalid_rreg_extamdgpu_invalid_wregamdgpu_invalid_wreg64amdgpu_invalid_wreg64_extamdgpu_invalid_wreg_extamdgpu_iomem_readamdgpu_iomem_writeamdgpu_irq_add_domainamdgpu_irq_add_idamdgpu_irq_create_mappingnum_dwamdgpu_irq_delegateamdgpu_irq_disable_allamdgpu_irq_dispatchamdgpu_irq_enabledamdgpu_irq_fini_hwamdgpu_irq_fini_swamdgpu_irq_getamdgpu_irq_gpu_reset_resume_helperamdgpu_irq_handle_ih1amdgpu_irq_handle_ih2amdgpu_irq_handle_ih_softamdgpu_irq_handleramdgpu_irq_initamdgpu_irq_maskamdgpu_irq_putamdgpu_irq_remove_domainamdgpu_irq_unmaskamdgpu_irq_updateamdgpu_irqdomain_mapamdgpu_is_atpx_hybridamdgpu_kms_compat_ioctlamdgpu_link_encoder_connectoramdgpu_lsdma_copy_memamdgpu_lsdma_fill_memamdgpu_lsdma_wait_foramdgpu_mem_info_vis_vram_total_showamdgpu_mem_info_vis_vram_used_showamdgpu_mem_info_vram_total_showamdgpu_mem_info_vram_used_showamdgpu_mem_info_vram_vendoramdgpu_mm_rreg8amdgpu_mm_wreg8amdgpu_mm_wreg_mmio_rlcamdgpu_mode_dumb_createoffset_pamdgpu_mode_dumb_mmapold_memamdgpu_move_blitamdgpu_nbio_get_pcie_replay_countcount0amdgpu_nbio_get_pcie_usageamdgpu_nbio_ras_late_initamdgpu_nbio_ras_sw_initamdgpu_panel_mode_fixupamdgpu_pasid_allocamdgpu_pasid_free_cbamdgpu_pasid_free_cbamdgpu_pasid_free_delayedamdgpu_pci_error_detectedamdgpu_pci_mmio_enabledamdgpu_pci_resumeamdgpu_pci_slot_resetamdgpu_put_xgmi_hiveinject_ifamdgpu_ras_error_inject_xgmiamdgpu_read_biosamdgpu_read_bios_from_romamdgpu_reg_state_sysfs_finiamdgpu_reg_state_sysfs_initamdgpu_register_atpx_handleramdgpu_res_cpu_visibleamdgpu_seq64_allocamdgpu_seq64_finiamdgpu_seq64_freeamdgpu_seq64_initseq64_addramdgpu_seq64_mapamdgpu_seq64_unmapamdgpu_show_fdinfoamdgpu_si_copy_bytes_to_smcamdgpu_si_is_smc_runningamdgpu_si_load_smc_ucodeamdgpu_si_program_jump_on_startsmc_addressamdgpu_si_read_smc_sram_dwordamdgpu_si_reset_smcamdgpu_si_send_msg_to_smcamdgpu_si_smc_clockamdgpu_si_start_smcamdgpu_si_wait_for_smc_inactiveamdgpu_si_write_smc_sram_dwordlength_bytesamdgpu_soc15_read_bios_from_romamdgpu_switcheroo_can_switchamdgpu_switcheroo_set_stateamdgpu_sync_cloneamdgpu_sync_createamdgpu_sync_entry_freeamdgpu_sync_fenceamdgpu_sync_finiamdgpu_sync_freeamdgpu_sync_get_fenceamdgpu_sync_initamdgpu_sync_keep_lateramdgpu_sync_peek_fenceamdgpu_sync_push_to_jobamdgpu_sync_resvamdgpu_sync_waitamdgpu_sysfs_reg_state_getamdgpu_ttm_access_memoryamdgpu_ttm_access_memory_sdmaamdgpu_ttm_alloc_gartbo_memamdgpu_ttm_backend_bindamdgpu_ttm_backend_destroyamdgpu_ttm_backend_unbindamdgpu_ttm_bo_eviction_valuableamdgpu_ttm_copy_mem_to_memamdgpu_ttm_debugfs_initamdgpu_ttm_domain_startamdgpu_ttm_evict_resourcesamdgpu_ttm_finiamdgpu_ttm_gart_bindamdgpu_ttm_initamdgpu_ttm_io_mem_pfnamdgpu_ttm_io_mem_reservemm_curamdgpu_ttm_map_bufferamdgpu_ttm_page_pool_openamdgpu_ttm_page_pool_showamdgpu_ttm_pools_initamdgpu_ttm_recover_gartamdgpu_ttm_reserve_tmramdgpu_ttm_set_buffer_funcs_statusamdgpu_ttm_tt_affect_userptramdgpu_ttm_tt_createamdgpu_ttm_tt_discard_user_pagesamdgpu_ttm_tt_get_user_pagesamdgpu_ttm_tt_get_user_pages_doneamdgpu_ttm_tt_get_usermmamdgpu_ttm_tt_get_userptramdgpu_ttm_tt_is_readonlyamdgpu_ttm_tt_is_userptramdgpu_ttm_tt_pde_flagsamdgpu_ttm_tt_populateamdgpu_ttm_tt_pte_flagsamdgpu_ttm_tt_set_user_pagesamdgpu_ttm_tt_set_userptramdgpu_ttm_tt_unpopulateamdgpu_ttm_vram_mm_accessamdgpu_ttm_vram_readamdgpu_ttm_vram_writeamdgpu_ucode_create_boamdgpu_ucode_free_boamdgpu_ucode_get_load_typehdr_majorhdr_minoramdgpu_ucode_hdr_versionamdgpu_ucode_init_boamdgpu_ucode_init_single_fwamdgpu_ucode_ip_version_decodeamdgpu_ucode_legacy_namingamdgpu_ucode_nameamdgpu_ucode_patch_jtamdgpu_ucode_print_common_hdramdgpu_ucode_print_gfx_hdramdgpu_ucode_print_gpu_info_hdramdgpu_ucode_print_mc_hdramdgpu_ucode_print_psp_hdramdgpu_ucode_print_rlc_hdramdgpu_ucode_print_sdma_hdramdgpu_ucode_print_smc_hdramdgpu_ucode_releaseamdgpu_ucode_requestamdgpu_ucode_sys_visibleamdgpu_ucode_sysfs_finiamdgpu_ucode_sysfs_initamdgpu_unregister_atpx_handleramdgpu_vce_cs_relocamdgpu_vce_entity_initamdgpu_vce_free_handlesamdgpu_vce_get_create_msgamdgpu_vce_get_destroy_msgamdgpu_vce_get_ring_prioamdgpu_vce_idle_work_handleramdgpu_vce_resumeamdgpu_vce_ring_begin_useamdgpu_vce_ring_emit_fenceamdgpu_vce_ring_emit_ibamdgpu_vce_ring_end_useamdgpu_vce_ring_parse_csamdgpu_vce_ring_parse_cs_vmamdgpu_vce_ring_test_ibamdgpu_vce_ring_test_ringamdgpu_vce_suspendamdgpu_vce_sw_finiamdgpu_vce_sw_initamdgpu_vce_validate_handleamdgpu_vcn_dec_ring_test_ibamdgpu_vcn_dec_ring_test_ringib_msgamdgpu_vcn_dec_send_msgamdgpu_vcn_dec_sw_ring_test_ibamdgpu_vcn_dec_sw_ring_test_ringamdgpu_vcn_dec_sw_send_msgamdgpu_vcn_early_initamdgpu_vcn_enc_get_create_msgamdgpu_vcn_enc_get_destroy_msgamdgpu_vcn_enc_ring_test_ibamdgpu_vcn_enc_ring_test_ringamdgpu_vcn_fwlog_initamdgpu_vcn_get_enc_ring_prioamdgpu_vcn_idle_work_handlervcn_instanceamdgpu_vcn_is_disabled_vcnamdgpu_vcn_process_poison_irqamdgpu_vcn_psp_update_sramamdgpu_vcn_ras_late_initamdgpu_vcn_ras_sw_initamdgpu_vcn_resumeamdgpu_vcn_ring_begin_useamdgpu_vcn_ring_end_useamdgpu_vcn_setup_ucodeamdgpu_vcn_suspendamdgpu_vcn_sw_finiamdgpu_vcn_sw_initib_pack_in_dwamdgpu_vcn_unified_ring_ib_headeramdgpu_vcn_unified_ring_test_ibamdgpu_vkms_cleanup_fbamdgpu_vkms_conn_get_modesamdgpu_vkms_crtc_atomic_disableamdgpu_vkms_crtc_atomic_enableamdgpu_vkms_crtc_atomic_flushamdgpu_vkms_disable_vblankamdgpu_vkms_enable_vblankamdgpu_vkms_get_vblank_timestampamdgpu_vkms_hw_finiamdgpu_vkms_hw_initamdgpu_vkms_is_idleamdgpu_vkms_output_initamdgpu_vkms_plane_atomic_checkamdgpu_vkms_plane_atomic_updateamdgpu_vkms_prepare_fbamdgpu_vkms_resumeamdgpu_vkms_set_clockgating_stateamdgpu_vkms_set_powergating_stateamdgpu_vkms_soft_resetamdgpu_vkms_suspendamdgpu_vkms_sw_finiamdgpu_vkms_sw_initamdgpu_vkms_vblank_simulateamdgpu_vkms_wait_for_idleamdgpu_vm_add_prt_cbmin_vm_sizefragment_size_defaultmax_bitsamdgpu_vm_adjust_sizeamdgpu_vm_bo_addamdgpu_vm_bo_base_initamdgpu_vm_bo_clear_mappingsamdgpu_vm_bo_delamdgpu_vm_bo_evictedamdgpu_vm_bo_findamdgpu_vm_bo_insert_mapamdgpu_vm_bo_invalidateamdgpu_vm_bo_lookup_mappingamdgpu_vm_bo_mapamdgpu_vm_bo_relocatedamdgpu_vm_bo_replace_mapamdgpu_vm_bo_trace_csamdgpu_vm_bo_unmapamdgpu_vm_bo_updateamdgpu_vm_check_compute_bugamdgpu_vm_clear_freedamdgpu_vm_cpu_commitamdgpu_vm_cpu_map_tableamdgpu_vm_cpu_prepareamdgpu_vm_cpu_updateamdgpu_vm_evictableamdgpu_vm_finineed_pipe_syncamdgpu_vm_flushamdgpu_vm_flush_compute_tlbamdgpu_vm_generationamdgpu_vm_get_memoryamdgpu_vm_get_task_infowrite_faultamdgpu_vm_handle_faultamdg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